--- a/Documentation/DMA-mapping.txt +++ b/Documentation/DMA-mapping.txt @@ -199,6 +199,8 @@ address during PCI bus mastering you mig "mydev: 24-bit DMA addressing not available.\n"); goto ignore_this_device; } +[Better use DMA_24BIT_MASK instead of 0x00ffffff. +See linux/include/dma-mapping.h for reference.] When pci_set_dma_mask() is successful, and returns zero, the PCI layer saves away this mask you have provided. The PCI layer will use this --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 16 -EXTRAVERSION =-rc1 +EXTRAVERSION =-rc1-kj1 NAME=Sliding Snow Leopard # *DOCUMENTATION* --- a/arch/alpha/kernel/core_apecs.c +++ b/arch/alpha/kernel/core_apecs.c @@ -182,7 +182,7 @@ conf_read(unsigned long addr, unsigned c if (stat0 & 0xffe0U) { /* If not NDEV, print status. */ if (!(stat0 & 0x0800)) { - printk("apecs.c:conf_read: got stat0=%x\n", stat0); + printk(KERN_INFO "apecs.c:conf_read: got stat0=%x\n", stat0); } /* Reset error status. */ @@ -251,7 +251,7 @@ conf_write(unsigned long addr, unsigned if (stat0 & 0xffe0U) { /* If not NDEV, print status. */ if (!(stat0 & 0x0800)) { - printk("apecs.c:conf_write: got stat0=%x\n", stat0); + printk(KERN_INFO "apecs.c:conf_write: got stat0=%x\n", stat0); } /* Reset error status. */ --- a/arch/alpha/kernel/core_cia.c +++ b/arch/alpha/kernel/core_cia.c @@ -428,7 +428,7 @@ verify_tb_operation(void) mcheck_expected(0) = 0; mb(); if (mcheck_taken(0)) { - printk("pci: failed sg loopback i/o read test (mcheck)\n"); + printk(KERN_WARNING "pci: failed sg loopback i/o read test (mcheck)\n"); goto failed; } if (temp != data0) { @@ -445,9 +445,9 @@ verify_tb_operation(void) temp = *(vip)CIA_IOC_TB_TAGn(0); if (temp & 1) { use_tbia_try2 = 1; - printk("pci: failed tbia test; workaround available\n"); + printk(KERN_WARNING "pci: failed tbia test; workaround available\n"); } else { - printk("pci: passed tbia test\n"); + printk(KERN_INFO "pci: passed tbia test\n"); } } @@ -465,7 +465,7 @@ verify_tb_operation(void) mcheck_expected(0) = 0; mb(); if (mcheck_taken(0)) { - printk("pci: failed pte write cache snoop test (mcheck)\n"); + printk(KERN_WARNING "pci: failed pte write cache snoop test (mcheck)\n"); goto failed; } if (temp != data0) { @@ -512,7 +512,7 @@ verify_tb_operation(void) mb(); mcheck_expected(0) = 0; mb(); - printk("pci: %s pci machine check test\n", + printk(KERN_INFO "pci: %s pci machine check test\n", mcheck_taken(0) ? "passed" : "failed"); /* Clean up after the tests. */ @@ -529,7 +529,7 @@ verify_tb_operation(void) *(vip)CIA_IOC_TB_TAGn(2) = 2; *(vip)CIA_IOC_TB_TAGn(3) = 2; - printk("pci: tbia workaround enabled\n"); + printk(KERN_INFO "pci: tbia workaround enabled\n"); } alpha_mv.mv_pci_tbi(arena->hose, 0, -1); @@ -546,7 +546,7 @@ exit: return; failed: - printk("pci: disabling sg translation window\n"); + printk(KERN_INFO "pci: disabling sg translation window\n"); *(vip)CIA_IOC_PCI_W0_BASE = 0; *(vip)CIA_IOC_PCI_W1_BASE = 0; pci_isa_hose->sg_isa = NULL; @@ -632,7 +632,7 @@ do_init_arch(int is_pyxis) int temp, cia_rev, tbia_window; cia_rev = *(vip)CIA_IOC_CIA_REV & CIA_REV_MASK; - printk("pci: cia revision %d%s\n", + printk(KERN_INFO "pci: cia revision %d%s\n", cia_rev, is_pyxis ? " (pyxis)" : ""); if (alpha_using_srm) --- a/arch/alpha/kernel/core_irongate.c +++ b/arch/alpha/kernel/core_irongate.c @@ -169,13 +169,13 @@ irongate_pci_clr_err(void) again: IRONGATE_jd = IRONGATE0->stat_cmd; - printk("Iron stat_cmd %x\n", IRONGATE_jd); + printk(KERN_INFO "Iron stat_cmd %x\n", IRONGATE_jd); IRONGATE0->stat_cmd = IRONGATE_jd; /* write again clears error bits */ mb(); IRONGATE_jd = IRONGATE0->stat_cmd; /* re-read to force write */ IRONGATE_jd = *IronECC; - printk("Iron ECC %x\n", IRONGATE_jd); + printk(KERN_INFO "Iron ECC %x\n", IRONGATE_jd); *IronECC = IRONGATE_jd; /* write again clears error bits */ mb(); IRONGATE_jd = *IronECC; /* re-read to force write */ @@ -351,7 +351,7 @@ irongate_ioremap(unsigned long addr, uns * Adjust the limits (mappings must be page aligned) */ if (addr & ~PAGE_MASK) { - printk("AGP ioremap failed... addr not page aligned (0x%lx)\n", + printk(KERN_WARNING "AGP ioremap failed... addr not page aligned (0x%lx)\n", addr); return (void __iomem *)(addr + IRONGATE_MEM); } @@ -359,17 +359,17 @@ irongate_ioremap(unsigned long addr, uns size = PAGE_ALIGN(last) - addr; #if 0 - printk("irongate_ioremap(0x%lx, 0x%lx)\n", addr, size); - printk("irongate_ioremap: gart_bus_addr 0x%lx\n", gart_bus_addr); - printk("irongate_ioremap: gart_aper_size 0x%lx\n", gart_aper_size); - printk("irongate_ioremap: mmio_regs %p\n", mmio_regs); - printk("irongate_ioremap: gatt_pages %p\n", gatt_pages); + printk(KERN_DEBUG "irongate_ioremap(0x%lx, 0x%lx)\n", addr, size); + printk(KERN_DEBUG "irongate_ioremap: gart_bus_addr 0x%lx\n", gart_bus_addr); + printk(KERN_DEBUG "irongate_ioremap: gart_aper_size 0x%lx\n", gart_aper_size); + printk(KERN_DEBUG "irongate_ioremap: mmio_regs %p\n", mmio_regs); + printk(KERN_DEBUG "irongate_ioremap: gatt_pages %p\n", gatt_pages); for(baddr = addr; baddr <= last; baddr += PAGE_SIZE) { cur_gatt = phys_to_virt(GET_GATT(baddr) & ~1); pte = cur_gatt[GET_GATT_OFF(baddr)] & ~1; - printk("irongate_ioremap: cur_gatt %p pte 0x%x\n", + printk(KERN_DEBUG "irongate_ioremap: cur_gatt %p pte 0x%x\n", cur_gatt, pte); } #endif @@ -389,7 +389,7 @@ irongate_ioremap(unsigned long addr, uns if (__alpha_remap_area_pages(vaddr, pte, PAGE_SIZE, 0)) { - printk("AGP ioremap: FAILED to map...\n"); + printk(KERN_WARNING "AGP ioremap: FAILED to map...\n"); vfree(area->addr); return NULL; } @@ -399,7 +399,7 @@ irongate_ioremap(unsigned long addr, uns vaddr = (unsigned long)area->addr + (addr & ~PAGE_MASK); #if 0 - printk("irongate_ioremap(0x%lx, 0x%lx) returning 0x%lx\n", + printk(KERN_DEBUG "irongate_ioremap(0x%lx, 0x%lx) returning 0x%lx\n", addr, size, vaddr); #endif return (void __iomem *)vaddr; --- a/arch/alpha/kernel/core_lca.c +++ b/arch/alpha/kernel/core_lca.c @@ -334,23 +334,23 @@ lca_init_arch(void) static void mem_error(unsigned long esr, unsigned long ear) { - printk(" %s %s error to %s occurred at address %x\n", + printk(KERN_ERR " %s %s error to %s occurred at address %x\n", ((esr & ESR_CEE) ? "Correctable" : (esr & ESR_UEE) ? "Uncorrectable" : "A"), (esr & ESR_WRE) ? "write" : "read", (esr & ESR_SOR) ? "memory" : "b-cache", (unsigned) (ear & 0x1ffffff8)); if (esr & ESR_CTE) { - printk(" A b-cache tag parity error was detected.\n"); + printk(KERN_ERR " A b-cache tag parity error was detected.\n"); } if (esr & ESR_MSE) { - printk(" Several other correctable errors occurred.\n"); + printk(KERN_ERR " Several other correctable errors occurred.\n"); } if (esr & ESR_MHE) { - printk(" Several other uncorrectable errors occurred.\n"); + printk(KERN_ERR " Several other uncorrectable errors occurred.\n"); } if (esr & ESR_NXM) { - printk(" Attempted to access non-existent memory.\n"); + printk(KERN_ERR " Attempted to access non-existent memory.\n"); } } @@ -372,16 +372,16 @@ ioc_error(__u32 stat0, __u32 stat1) unsigned code = (stat0 & IOC_CODE) >> IOC_CODE_SHIFT; unsigned cmd = (stat0 & IOC_CMD) >> IOC_CMD_SHIFT; - printk(" %s initiated PCI %s cycle to address %x" + printk(KERN_ERR " %s initiated PCI %s cycle to address %x" " failed due to %s.\n", code > 3 ? "PCI" : "CPU", pci_cmd[cmd], stat1, err_name[code]); if (code == 5 || code == 6) { - printk(" (Error occurred at PCI memory address %x.)\n", + printk(KERN_ERR " (Error occurred at PCI memory address %x.)\n", (stat0 & ~IOC_P_NBR)); } if (stat0 & IOC_LOST) { - printk(" Other PCI errors occurred simultaneously.\n"); + printk(KERN_ERR " Other PCI errors occurred simultaneously.\n"); } } @@ -482,12 +482,12 @@ lca_clock_print(void) pmr_reg = LCA_READ_PMR; - printk("Status of clock control:\n"); - printk("\tPrimary clock divisor\t0x%lx\n", LCA_GET_PRIMARY(pmr_reg)); - printk("\tOverride clock divisor\t0x%lx\n", LCA_GET_OVERRIDE(pmr_reg)); - printk("\tInterrupt override is %s\n", + printk(KERN_INFO "Status of clock control:\n"); + printk(KERN_INFO "\tPrimary clock divisor\t0x%lx\n", LCA_GET_PRIMARY(pmr_reg)); + printk(KERN_INFO "\tOverride clock divisor\t0x%lx\n", LCA_GET_OVERRIDE(pmr_reg)); + printk(KERN_INFO "\tInterrupt override is %s\n", (pmr_reg & LCA_PMR_INTO) ? "on" : "off"); - printk("\tDMA override is %s\n", + printk(KERN_INFO "\tDMA override is %s\n", (pmr_reg & LCA_PMR_DMAO) ? "on" : "off"); } --- a/arch/alpha/kernel/core_marvel.c +++ b/arch/alpha/kernel/core_marvel.c @@ -332,7 +332,7 @@ marvel_init_io7(struct io7 *io7) { int i; - printk("Initializing IO7 at PID %d\n", io7->pe); + printk(KERN_INFO "Initializing IO7 at PID %d\n", io7->pe); /* * Get the Port 7 CSR pointer. @@ -361,7 +361,7 @@ marvel_io7_present(gct6_node *node) return; pe = (node->id >> 8) & 0xff; - printk("Found an IO7 at PID %d\n", pe); + printk(KERN_INFO "Found an IO7 at PID %d\n", pe); alloc_io7(pe); } @@ -383,7 +383,7 @@ marvel_init_vga_hose(void) * need to fix this decode when the console * changes its encoding */ - printk("console graphics is on hose %d (console)\n", h); + printk(KERN_INFO "console graphics is on hose %d (console)\n", h); /* * The console's hose numbering is: @@ -399,7 +399,7 @@ marvel_init_vga_hose(void) hose = io7->ports[port].hose; if (hose) { - printk("Console graphics on hose %d\n", hose->index); + printk(KERN_INFO "Console graphics on hose %d\n", hose->index); pci_vga_hose = hose; } } @@ -426,7 +426,7 @@ marvel_specify_io7(char *str) do { pid = simple_strtoul(str, &pchar, 0); if (pchar != str) { - printk("User-specified IO7 at PID %lu\n", pid); + printk(KERN_INFO "User-specified IO7 at PID %lu\n", pid); io7 = alloc_io7(pid); if (io7) marvel_init_io7(io7); } @@ -759,7 +759,7 @@ marvel_ioremap(unsigned long addr, unsig baddr += PAGE_SIZE, vaddr += PAGE_SIZE) { pfn = ptes[baddr >> PAGE_SHIFT]; if (!(pfn & 1)) { - printk("ioremap failed... pte not valid...\n"); + printk(KERN_ERR "ioremap failed... pte not valid...\n"); vfree(area->addr); return NULL; } @@ -768,7 +768,7 @@ marvel_ioremap(unsigned long addr, unsig if (__alpha_remap_area_pages(vaddr, pfn << PAGE_SHIFT, PAGE_SIZE, 0)) { - printk("FAILED to map...\n"); + printk(KERN_ERR "FAILED to map...\n"); vfree(area->addr); return NULL; } @@ -1002,7 +1002,7 @@ marvel_agp_configure(alpha_agp_info *agp * Don't know what this PLL setting is, take the requested * rate, but warn the user. */ - printk("%s: unknown PLL setting RNGB=%lx (PLL6_CTL=%016lx)\n", + printk(KERN_INFO "%s: unknown PLL setting RNGB=%lx (PLL6_CTL=%016lx)\n", __FUNCTION__, IO7_PLL_RNGB(agp_pll), agp_pll); break; } @@ -1011,7 +1011,7 @@ marvel_agp_configure(alpha_agp_info *agp * Set the new rate, if necessary. */ if (new_rate) { - printk("Requested AGP Rate %dX not compatible " + printk(KERN_INFO "Requested AGP Rate %dX not compatible " "with PLL setting - using %dX\n", agp->mode.bits.rate, new_rate); @@ -1019,7 +1019,7 @@ marvel_agp_configure(alpha_agp_info *agp agp->mode.bits.rate = new_rate; } - printk("Enabling AGP on hose %d: %dX%s RQ %d\n", + printk(KERN_INFO "Enabling AGP on hose %d: %dX%s RQ %d\n", agp->hose->index, agp->mode.bits.rate, agp->mode.bits.sba ? " - SBA" : "", agp->mode.bits.rq); @@ -1053,13 +1053,13 @@ marvel_agp_translate(alpha_agp_info *agp if (addr < agp->aperture.bus_base || addr >= agp->aperture.bus_base + agp->aperture.size) { - printk("%s: addr out of range\n", __FUNCTION__); + printk(KERN_ERR "%s: addr out of range\n", __FUNCTION__); return -EINVAL; } pte = aper->arena->ptes[baddr >> PAGE_SHIFT]; if (!(pte & 1)) { - printk("%s: pte not valid\n", __FUNCTION__); + printk(KERN_ERR "%s: pte not valid\n", __FUNCTION__); return -EINVAL; } return (pte >> 1) << PAGE_SHIFT; @@ -1109,7 +1109,7 @@ marvel_agp_info(void) if (!hose || !hose->sg_pci) return NULL; - printk("MARVEL - using hose %d as AGP\n", hose->index); + printk(KERN_INFO "MARVEL - using hose %d as AGP\n", hose->index); /* * Get the csrs from the hose. --- a/arch/alpha/kernel/core_mcpcia.c +++ b/arch/alpha/kernel/core_mcpcia.c @@ -433,7 +433,7 @@ mcpcia_init_hoses(void) } } - printk("mcpcia_init_hoses: found %d hoses\n", hose_count); + printk(KERN_INFO "mcpcia_init_hoses: found %d hoses\n", hose_count); /* Now do init for each hose. */ for (hose = hose_head; hose; hose = hose->next) @@ -450,65 +450,65 @@ mcpcia_print_uncorrectable(struct el_MCP /* Print PAL fields */ for (i = 0; i < 24; i += 2) { - printk(" paltmp[%d-%d] = %16lx %16lx\n", + printk(KERN_INFO " paltmp[%d-%d] = %16lx %16lx\n", i, i+1, frame->paltemp[i], frame->paltemp[i+1]); } for (i = 0; i < 8; i += 2) { - printk(" shadow[%d-%d] = %16lx %16lx\n", + printk(KERN_INFO " shadow[%d-%d] = %16lx %16lx\n", i, i+1, frame->shadow[i], frame->shadow[i+1]); } - printk(" Addr of excepting instruction = %16lx\n", + printk(KERN_INFO " Addr of excepting instruction = %16lx\n", frame->exc_addr); - printk(" Summary of arithmetic traps = %16lx\n", + printk(KERN_INFO " Summary of arithmetic traps = %16lx\n", frame->exc_sum); - printk(" Exception mask = %16lx\n", + printk(KERN_INFO " Exception mask = %16lx\n", frame->exc_mask); - printk(" Base address for PALcode = %16lx\n", + printk(KERN_INFO " Base address for PALcode = %16lx\n", frame->pal_base); - printk(" Interrupt Status Reg = %16lx\n", + printk(KERN_INFO " Interrupt Status Reg = %16lx\n", frame->isr); - printk(" CURRENT SETUP OF EV5 IBOX = %16lx\n", + printk(KERN_INFO " CURRENT SETUP OF EV5 IBOX = %16lx\n", frame->icsr); - printk(" I-CACHE Reg %s parity error = %16lx\n", + printk(KERN_INFO " I-CACHE Reg %s parity error = %16lx\n", (frame->ic_perr_stat & 0x800L) ? "Data" : "Tag", frame->ic_perr_stat); - printk(" D-CACHE error Reg = %16lx\n", + printk(KERN_INFO " D-CACHE error Reg = %16lx\n", frame->dc_perr_stat); if (frame->dc_perr_stat & 0x2) { switch (frame->dc_perr_stat & 0x03c) { case 8: - printk(" Data error in bank 1\n"); + printk(KERN_INFO " Data error in bank 1\n"); break; case 4: - printk(" Data error in bank 0\n"); + printk(KERN_INFO " Data error in bank 0\n"); break; case 20: - printk(" Tag error in bank 1\n"); + printk(KERN_INFO " Tag error in bank 1\n"); break; case 10: - printk(" Tag error in bank 0\n"); + printk(KERN_INFO " Tag error in bank 0\n"); break; } } - printk(" Effective VA = %16lx\n", + printk(KERN_INFO " Effective VA = %16lx\n", frame->va); - printk(" Reason for D-stream = %16lx\n", + printk(KERN_INFO " Reason for D-stream = %16lx\n", frame->mm_stat); - printk(" EV5 SCache address = %16lx\n", + printk(KERN_INFO " EV5 SCache address = %16lx\n", frame->sc_addr); - printk(" EV5 SCache TAG/Data parity = %16lx\n", + printk(KERN_INFO " EV5 SCache TAG/Data parity = %16lx\n", frame->sc_stat); - printk(" EV5 BC_TAG_ADDR = %16lx\n", + printk(KERN_INFO " EV5 BC_TAG_ADDR = %16lx\n", frame->bc_tag_addr); - printk(" EV5 EI_ADDR: Phys addr of Xfer = %16lx\n", + printk(KERN_INFO " EV5 EI_ADDR: Phys addr of Xfer = %16lx\n", frame->ei_addr); - printk(" Fill Syndrome = %16lx\n", + printk(KERN_INFO " Fill Syndrome = %16lx\n", frame->fill_syndrome); - printk(" EI_STAT reg = %16lx\n", + printk(KERN_INFO " EI_STAT reg = %16lx\n", frame->ei_stat); - printk(" LD_LOCK = %16lx\n", + printk(KERN_INFO " LD_LOCK = %16lx\n", frame->ld_lock); } @@ -549,25 +549,25 @@ mcpcia_print_system_area(unsigned long l for (hose = hose_head; hose; hose = hose->next, iodpp++) { - printk("IOD %d Register Subpacket - Bridge Base Address %16lx\n", + printk(KERN_INFO "IOD %d Register Subpacket - Bridge Base Address %16lx\n", hose->index, iodpp->base); - printk(" WHOAMI = %8x\n", iodpp->whoami); - printk(" PCI_REV = %8x\n", iodpp->pci_rev); - printk(" CAP_CTRL = %8x\n", iodpp->cap_ctrl); - printk(" HAE_MEM = %8x\n", iodpp->hae_mem); - printk(" HAE_IO = %8x\n", iodpp->hae_io); - printk(" INT_CTL = %8x\n", iodpp->int_ctl); - printk(" INT_REG = %8x\n", iodpp->int_reg); - printk(" INT_MASK0 = %8x\n", iodpp->int_mask0); - printk(" INT_MASK1 = %8x\n", iodpp->int_mask1); - printk(" MC_ERR0 = %8x\n", iodpp->mc_err0); - printk(" MC_ERR1 = %8x\n", iodpp->mc_err1); - printk(" CAP_ERR = %8x\n", iodpp->cap_err); - printk(" PCI_ERR1 = %8x\n", iodpp->pci_err1); - printk(" MDPA_STAT = %8x\n", iodpp->mdpa_stat); - printk(" MDPA_SYN = %8x\n", iodpp->mdpa_syn); - printk(" MDPB_STAT = %8x\n", iodpp->mdpb_stat); - printk(" MDPB_SYN = %8x\n", iodpp->mdpb_syn); + printk(KERN_INFO " WHOAMI = %8x\n", iodpp->whoami); + printk(KERN_INFO " PCI_REV = %8x\n", iodpp->pci_rev); + printk(KERN_INFO " CAP_CTRL = %8x\n", iodpp->cap_ctrl); + printk(KERN_INFO " HAE_MEM = %8x\n", iodpp->hae_mem); + printk(KERN_INFO " HAE_IO = %8x\n", iodpp->hae_io); + printk(KERN_INFO " INT_CTL = %8x\n", iodpp->int_ctl); + printk(KERN_INFO " INT_REG = %8x\n", iodpp->int_reg); + printk(KERN_INFO " INT_MASK0 = %8x\n", iodpp->int_mask0); + printk(KERN_INFO " INT_MASK1 = %8x\n", iodpp->int_mask1); + printk(KERN_INFO " MC_ERR0 = %8x\n", iodpp->mc_err0); + printk(KERN_INFO " MC_ERR1 = %8x\n", iodpp->mc_err1); + printk(KERN_INFO " CAP_ERR = %8x\n", iodpp->cap_err); + printk(KERN_INFO " PCI_ERR1 = %8x\n", iodpp->pci_err1); + printk(KERN_INFO " MDPA_STAT = %8x\n", iodpp->mdpa_stat); + printk(KERN_INFO " MDPA_SYN = %8x\n", iodpp->mdpa_syn); + printk(KERN_INFO " MDPB_STAT = %8x\n", iodpp->mdpb_stat); + printk(KERN_INFO " MDPB_SYN = %8x\n", iodpp->mdpb_syn); } } --- a/arch/alpha/kernel/core_polaris.c +++ b/arch/alpha/kernel/core_polaris.c @@ -152,7 +152,7 @@ polaris_init_arch(void) * already. */ #if 0 - printk("polaris_init_arch(): trusting firmware for setup\n"); + printk(KERN_INFO "polaris_init_arch(): trusting firmware for setup\n"); #endif /* --- a/arch/alpha/kernel/core_t2.c +++ b/arch/alpha/kernel/core_t2.c @@ -335,7 +335,7 @@ t2_direct_map_window1(unsigned long base *(vulp)T2_TBASE1 = 0; #if DEBUG_PRINT_FINAL_SETTINGS - printk("%s: setting WBASE1=0x%lx WMASK1=0x%lx TBASE1=0x%lx\n", + printk(KERN_DEBUG "%s: setting WBASE1=0x%lx WMASK1=0x%lx TBASE1=0x%lx\n", __FUNCTION__, *(vulp)T2_WBASE1, *(vulp)T2_WMASK1, @@ -365,7 +365,7 @@ t2_sg_map_window2(struct pci_controller t2_pci_tbi(hose, 0, -1); /* flush TLB all */ #if DEBUG_PRINT_FINAL_SETTINGS - printk("%s: setting WBASE2=0x%lx WMASK2=0x%lx TBASE2=0x%lx\n", + printk(KERN_DEBUG "%s: setting WBASE2=0x%lx WMASK2=0x%lx TBASE2=0x%lx\n", __FUNCTION__, *(vulp)T2_WBASE2, *(vulp)T2_WMASK2, @@ -377,15 +377,15 @@ static void __init t2_save_configuration(void) { #if DEBUG_PRINT_INITIAL_SETTINGS - printk("%s: HAE_1 was 0x%lx\n", __FUNCTION__, srm_hae); /* HW is 0 */ - printk("%s: HAE_2 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_2); - printk("%s: HAE_3 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_3); - printk("%s: HAE_4 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_4); - printk("%s: HBASE was 0x%lx\n", __FUNCTION__, *(vulp)T2_HBASE); + printk(KERN_DEBUG "%s: HAE_1 was 0x%lx\n", __FUNCTION__, srm_hae); /* HW is 0 */ + printk(KERN_DEBUG "%s: HAE_2 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_2); + printk(KERN_DEBUG "%s: HAE_3 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_3); + printk(KERN_DEBUG "%s: HAE_4 was 0x%lx\n", __FUNCTION__, *(vulp)T2_HAE_4); + printk(KERN_DEBUG "%s: HBASE was 0x%lx\n", __FUNCTION__, *(vulp)T2_HBASE); - printk("%s: WBASE1=0x%lx WMASK1=0x%lx TBASE1=0x%lx\n", __FUNCTION__, + printk(KERN_DEBUG "%s: WBASE1=0x%lx WMASK1=0x%lx TBASE1=0x%lx\n", __FUNCTION__, *(vulp)T2_WBASE1, *(vulp)T2_WMASK1, *(vulp)T2_TBASE1); - printk("%s: WBASE2=0x%lx WMASK2=0x%lx TBASE2=0x%lx\n", __FUNCTION__, + printk(KERN_DEBUG "%s: WBASE2=0x%lx WMASK2=0x%lx TBASE2=0x%lx\n", __FUNCTION__, *(vulp)T2_WBASE2, *(vulp)T2_WMASK2, *(vulp)T2_TBASE2); #endif @@ -423,7 +423,7 @@ t2_init_arch(void) /* Enable scatter/gather TLB use. */ temp = *(vulp)T2_IOCSR; if (!(temp & (0x1UL << 26))) { - printk("t2_init_arch: enabling SG TLB, IOCSR was 0x%lx\n", + printk(KERN_INFO "t2_init_arch: enabling SG TLB, IOCSR was 0x%lx\n", temp); *(vulp)T2_IOCSR = temp | (0x1UL << 26); mb(); @@ -580,7 +580,7 @@ t2_machine_check(unsigned long vector, u */ #ifdef CONFIG_VERBOSE_MCHECK if (alpha_verbose_mcheck > 1) { - printk("t2_machine_check(cpu%d): any_expected 0x%x -" + printk(KERN_INFO "t2_machine_check(cpu%d): any_expected 0x%x -" " (assumed) spurious -" " code 0x%x\n", cpu, t2_mcheck_any_expected, (unsigned int)mchk_header->code); @@ -593,7 +593,7 @@ t2_machine_check(unsigned long vector, u if (t2_mcheck_last_taken & (1 << cpu)) { #ifdef CONFIG_VERBOSE_MCHECK if (alpha_verbose_mcheck > 1) { - printk("t2_machine_check(cpu%d): last_taken 0x%x - " + printk(KERN_INFO "t2_machine_check(cpu%d): last_taken 0x%x - " "unexpected mcheck - code 0x%x\n", cpu, t2_mcheck_last_taken, (unsigned int)mchk_header->code); @@ -610,7 +610,7 @@ t2_machine_check(unsigned long vector, u #ifdef CONFIG_VERBOSE_MCHECK if (alpha_verbose_mcheck > 1) { - printk("%s t2_mcheck(cpu%d): last_taken 0x%x - " + printk(KERN_INFO "%s t2_mcheck(cpu%d): last_taken 0x%x - " "any_expected 0x%x - code 0x%x\n", (mcheck_expected(cpu) ? "EX" : "UN"), cpu, t2_mcheck_last_taken, t2_mcheck_any_expected, --- a/arch/alpha/kernel/core_titan.c +++ b/arch/alpha/kernel/core_titan.c @@ -374,7 +374,7 @@ titan_init_vga_hose(void) } if (hose) { - printk("Console graphics on hose %d\n", hose->index); + printk(KERN_INFO "Console graphics on hose %d\n", hose->index); pci_vga_hose = hose; } } @@ -385,21 +385,21 @@ void __init titan_init_arch(void) { #if 0 - printk("%s: titan_init_arch()\n", __FUNCTION__); - printk("%s: CChip registers:\n", __FUNCTION__); - printk("%s: CSR_CSC 0x%lx\n", __FUNCTION__, TITAN_cchip->csc.csr); - printk("%s: CSR_MTR 0x%lx\n", __FUNCTION__, TITAN_cchip->mtr.csr); - printk("%s: CSR_MISC 0x%lx\n", __FUNCTION__, TITAN_cchip->misc.csr); - printk("%s: CSR_DIM0 0x%lx\n", __FUNCTION__, TITAN_cchip->dim0.csr); - printk("%s: CSR_DIM1 0x%lx\n", __FUNCTION__, TITAN_cchip->dim1.csr); - printk("%s: CSR_DIR0 0x%lx\n", __FUNCTION__, TITAN_cchip->dir0.csr); - printk("%s: CSR_DIR1 0x%lx\n", __FUNCTION__, TITAN_cchip->dir1.csr); - printk("%s: CSR_DRIR 0x%lx\n", __FUNCTION__, TITAN_cchip->drir.csr); - - printk("%s: DChip registers:\n", __FUNCTION__); - printk("%s: CSR_DSC 0x%lx\n", __FUNCTION__, TITAN_dchip->dsc.csr); - printk("%s: CSR_STR 0x%lx\n", __FUNCTION__, TITAN_dchip->str.csr); - printk("%s: CSR_DREV 0x%lx\n", __FUNCTION__, TITAN_dchip->drev.csr); + printk(KERN_DEBUG "%s: titan_init_arch()\n", __FUNCTION__); + printk(KERN_DEBUG "%s: CChip registers:\n", __FUNCTION__); + printk(KERN_DEBUG "%s: CSR_CSC 0x%lx\n", __FUNCTION__, TITAN_cchip->csc.csr); + printk(KERN_DEBUG "%s: CSR_MTR 0x%lx\n", __FUNCTION__, TITAN_cchip->mtr.csr); + printk(KERN_DEBUG "%s: CSR_MISC 0x%lx\n", __FUNCTION__, TITAN_cchip->misc.csr); + printk(KERN_DEBUG "%s: CSR_DIM0 0x%lx\n", __FUNCTION__, TITAN_cchip->dim0.csr); + printk(KERN_DEBUG "%s: CSR_DIM1 0x%lx\n", __FUNCTION__, TITAN_cchip->dim1.csr); + printk(KERN_DEBUG "%s: CSR_DIR0 0x%lx\n", __FUNCTION__, TITAN_cchip->dir0.csr); + printk(KERN_DEBUG "%s: CSR_DIR1 0x%lx\n", __FUNCTION__, TITAN_cchip->dir1.csr); + printk(KERN_DEBUG "%s: CSR_DRIR 0x%lx\n", __FUNCTION__, TITAN_cchip->drir.csr); + + printk(KERN_DEBUG "%s: DChip registers:\n", __FUNCTION__); + printk(KERN_DEBUG "%s: CSR_DSC 0x%lx\n", __FUNCTION__, TITAN_dchip->dsc.csr); + printk(KERN_DEBUG "%s: CSR_STR 0x%lx\n", __FUNCTION__, TITAN_dchip->str.csr); + printk(KERN_DEBUG "%s: CSR_DREV 0x%lx\n", __FUNCTION__, TITAN_dchip->drev.csr); #endif boot_cpuid = __hard_smp_processor_id(); @@ -530,7 +530,7 @@ titan_ioremap(unsigned long addr, unsign baddr += PAGE_SIZE, vaddr += PAGE_SIZE) { pfn = ptes[baddr >> PAGE_SHIFT]; if (!(pfn & 1)) { - printk("ioremap failed... pte not valid...\n"); + printk(KERN_ERR "ioremap failed... pte not valid...\n"); vfree(area->addr); return NULL; } @@ -539,7 +539,7 @@ titan_ioremap(unsigned long addr, unsign if (__alpha_remap_area_pages(vaddr, pfn << PAGE_SHIFT, PAGE_SIZE, 0)) { - printk("FAILED to map...\n"); + printk(KERN_ERR "FAILED to map...\n"); vfree(area->addr); return NULL; } @@ -711,13 +711,13 @@ titan_agp_translate(alpha_agp_info *agp, if (addr < agp->aperture.bus_base || addr >= agp->aperture.bus_base + agp->aperture.size) { - printk("%s: addr out of range\n", __FUNCTION__); + printk(KERN_ERR "%s: addr out of range\n", __FUNCTION__); return -EINVAL; } pte = aper->arena->ptes[baddr >> PAGE_SHIFT]; if (!(pte & 1)) { - printk("%s: pte not valid\n", __FUNCTION__); + printk(KERN_ERR "%s: pte not valid\n", __FUNCTION__); return -EINVAL; } --- a/arch/alpha/kernel/core_tsunami.c +++ b/arch/alpha/kernel/core_tsunami.c @@ -211,7 +211,7 @@ tsunami_probe_read(volatile unsigned lon mcheck_taken(cpu) = 0; setipl(s); - printk("dont_care == 0x%lx\n", dont_care); + printk(KERN_INFO "dont_care == 0x%lx\n", dont_care); return probe_result; } @@ -229,7 +229,7 @@ tsunami_probe_write(volatile unsigned lo int source = (TSUNAMI_cchip->misc.csr >> 29) & 7; TSUNAMI_cchip->misc.csr |= (1L << 28); /* ...and unlock NXS. */ probe_result = 0; - printk("tsunami_probe_write: unit %d at 0x%016lx\n", source, + printk(KERN_INFO "tsunami_probe_write: unit %d at 0x%016lx\n", source, (unsigned long)vaddr); } if (probe_result) @@ -362,27 +362,27 @@ tsunami_init_arch(void) /* NXMs just don't matter to Tsunami--unless they make it choke completely. */ tmp = (unsigned long)(TSUNAMI_cchip - 1); - printk("%s: probing bogus address: 0x%016lx\n", FN, bogus_addr); - printk("\tprobe %s\n", + printk(KERN_INFO "%s: probing bogus address: 0x%016lx\n", FN, bogus_addr); + printk(KERN_INFO "\tprobe %s\n", tsunami_probe_write((unsigned long *)bogus_addr) ? "succeeded" : "failed"); #endif /* NXM_MACHINE_CHECKS_ON_TSUNAMI */ #if 0 - printk("%s: CChip registers:\n", FN); - printk("%s: CSR_CSC 0x%lx\n", FN, TSUNAMI_cchip->csc.csr); - printk("%s: CSR_MTR 0x%lx\n", FN, TSUNAMI_cchip.mtr.csr); - printk("%s: CSR_MISC 0x%lx\n", FN, TSUNAMI_cchip->misc.csr); - printk("%s: CSR_DIM0 0x%lx\n", FN, TSUNAMI_cchip->dim0.csr); - printk("%s: CSR_DIM1 0x%lx\n", FN, TSUNAMI_cchip->dim1.csr); - printk("%s: CSR_DIR0 0x%lx\n", FN, TSUNAMI_cchip->dir0.csr); - printk("%s: CSR_DIR1 0x%lx\n", FN, TSUNAMI_cchip->dir1.csr); - printk("%s: CSR_DRIR 0x%lx\n", FN, TSUNAMI_cchip->drir.csr); - - printk("%s: DChip registers:\n"); - printk("%s: CSR_DSC 0x%lx\n", FN, TSUNAMI_dchip->dsc.csr); - printk("%s: CSR_STR 0x%lx\n", FN, TSUNAMI_dchip->str.csr); - printk("%s: CSR_DREV 0x%lx\n", FN, TSUNAMI_dchip->drev.csr); + printk(KERN_DEBUG "%s: CChip registers:\n", FN); + printk(KERN_DEBUG "%s: CSR_CSC 0x%lx\n", FN, TSUNAMI_cchip->csc.csr); + printk(KERN_DEBUG "%s: CSR_MTR 0x%lx\n", FN, TSUNAMI_cchip.mtr.csr); + printk(KERN_DEBUG "%s: CSR_MISC 0x%lx\n", FN, TSUNAMI_cchip->misc.csr); + printk(KERN_DEBUG "%s: CSR_DIM0 0x%lx\n", FN, TSUNAMI_cchip->dim0.csr); + printk(KERN_DEBUG "%s: CSR_DIM1 0x%lx\n", FN, TSUNAMI_cchip->dim1.csr); + printk(KERN_DEBUG "%s: CSR_DIR0 0x%lx\n", FN, TSUNAMI_cchip->dir0.csr); + printk(KERN_DEBUG "%s: CSR_DIR1 0x%lx\n", FN, TSUNAMI_cchip->dir1.csr); + printk(KERN_DEBUG "%s: CSR_DRIR 0x%lx\n", FN, TSUNAMI_cchip->drir.csr); + + printk(KERN_DEBUG "%s: DChip registers:\n"); + printk(KERN_DEBUG "%s: CSR_DSC 0x%lx\n", FN, TSUNAMI_dchip->dsc.csr); + printk(KERN_DEBUG "%s: CSR_STR 0x%lx\n", FN, TSUNAMI_dchip->str.csr); + printk(KERN_DEBUG "%s: CSR_DREV 0x%lx\n", FN, TSUNAMI_dchip->drev.csr); #endif /* With multiple PCI busses, we play with I/O as physical addrs. */ ioport_resource.end = ~0UL; --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c @@ -408,7 +408,7 @@ pcibios_set_master(struct pci_dev *dev) u8 lat; pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); if (lat >= 16) return; - printk("PCI: Setting latency timer of device %s to 64\n", + printk(KERN_INFO "PCI: Setting latency timer of device %s to 64\n", pci_name(dev)); pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); } --- a/arch/alpha/kernel/pci_iommu.c +++ b/arch/alpha/kernel/pci_iommu.c @@ -79,7 +79,7 @@ iommu_arena_new_node(int nid, struct pci if (!NODE_DATA(nid) || (NULL == (arena = alloc_bootmem_node(NODE_DATA(nid), sizeof(*arena))))) { - printk("%s: couldn't allocate arena from node %d\n" + printk(KERN_WARNING "%s: couldn't allocate arena from node %d\n" " falling back to system-wide allocation\n", __FUNCTION__, nid); arena = alloc_bootmem(sizeof(*arena)); @@ -90,7 +90,7 @@ iommu_arena_new_node(int nid, struct pci mem_size, align, 0)))) { - printk("%s: couldn't allocate arena ptes from node %d\n" + printk(KERN_WARNING "%s: couldn't allocate arena ptes from node %d\n" " falling back to system-wide allocation\n", __FUNCTION__, nid); arena->ptes = __alloc_bootmem(mem_size, align, 0); --- a/arch/alpha/kernel/ptrace.c +++ b/arch/alpha/kernel/ptrace.c @@ -239,7 +239,7 @@ ptrace_cancel_bpt(struct task_struct * c task_thread_info(child)->bpt_nsaved = 0; if (nsaved > 2) { - printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); + printk(KERN_ERR "ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); nsaved = 2; } --- a/arch/alpha/kernel/semaphore.c +++ b/arch/alpha/kernel/semaphore.c @@ -68,7 +68,7 @@ __down_failed(struct semaphore *sem) DECLARE_WAITQUEUE(wait, tsk); #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down failed(%p)\n", + printk(KERN_DEBUG "%s(%d): down failed(%p)\n", tsk->comm, tsk->pid, sem); #endif @@ -97,7 +97,7 @@ __down_failed(struct semaphore *sem) wake_up(&sem->wait); #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down acquired(%p)\n", + printk(KERN_DEBUG "%s(%d): down acquired(%p)\n", tsk->comm, tsk->pid, sem); #endif } @@ -110,7 +110,7 @@ __down_failed_interruptible(struct semap long ret = 0; #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down failed(%p)\n", + printk(KERN_DEBUG "%s(%d): down failed(%p)\n", tsk->comm, tsk->pid, sem); #endif @@ -138,7 +138,7 @@ __down_failed_interruptible(struct semap wake_up(&sem->wait); #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down %s(%p)\n", + printk(KERN_DEBUG "%s(%d): down %s(%p)\n", current->comm, current->pid, (ret < 0 ? "interrupted" : "acquired"), sem); #endif @@ -167,7 +167,7 @@ down(struct semaphore *sem) CHECK_MAGIC(sem->__magic); #endif #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down(%p) from %p\n", + printk(KERN_DEBUG "%s(%d): down(%p) from %p\n", current->comm, current->pid, sem, atomic_read(&sem->count), __builtin_return_address(0)); #endif @@ -181,7 +181,7 @@ down_interruptible(struct semaphore *sem CHECK_MAGIC(sem->__magic); #endif #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down(%p) from %p\n", + printk(KERN_DEBUG "%s(%d): down(%p) from %p\n", current->comm, current->pid, sem, atomic_read(&sem->count), __builtin_return_address(0)); #endif @@ -200,7 +200,7 @@ down_trylock(struct semaphore *sem) ret = __down_trylock(sem); #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): down_trylock %s from %p\n", + printk(KERN_DEBUG "%s(%d): down_trylock %s from %p\n", current->comm, current->pid, ret ? "failed" : "acquired", __builtin_return_address(0)); @@ -216,7 +216,7 @@ up(struct semaphore *sem) CHECK_MAGIC(sem->__magic); #endif #ifdef CONFIG_DEBUG_SEMAPHORE - printk("%s(%d): up(%p) from %p\n", + printk(KERN_DEBUG "%s(%d): up(%p) from %p\n", current->comm, current->pid, sem, atomic_read(&sem->count), __builtin_return_address(0)); #endif --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c @@ -285,7 +285,7 @@ move_initrd(unsigned long mem_limit) memmove(start, (void *)initrd_start, size); initrd_start = (unsigned long)start; initrd_end = initrd_start + size; - printk("initrd moved to %p\n", start); + printk(KERN_INFO "initrd moved to %p\n", start); return start; } #endif @@ -306,7 +306,7 @@ setup_memory(void *kernel_end) (hwrpb->mddt_offset + (unsigned long) hwrpb); for_each_mem_cluster(memdesc, cluster, i) { - printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n", + printk(KERN_INFO "memcluster %lu, usage %01lx, start %8lu, end %8lu\n", i, cluster->usage, cluster->start_pfn, cluster->start_pfn + cluster->numpages); @@ -341,7 +341,7 @@ setup_memory(void *kernel_end) if (mem_size_limit && max_low_pfn >= mem_size_limit) { - printk("setup: forcing memory size to %ldK (from %ldK).\n", + printk(KERN_INFO "setup: forcing memory size to %ldK (from %ldK).\n", mem_size_limit << (PAGE_SHIFT - 10), max_low_pfn << (PAGE_SHIFT - 10)); max_low_pfn = mem_size_limit; @@ -410,7 +410,7 @@ setup_memory(void *kernel_end) free_bootmem(PFN_PHYS(start), (PFN_PHYS(start_kernel_pfn) - PFN_PHYS(start))); - printk("freeing pages %ld:%ld\n", + printk(KERN_INFO "freeing pages %ld:%ld\n", start, start_kernel_pfn); start = end_kernel_pfn; } else if (end > start_kernel_pfn) @@ -421,23 +421,23 @@ setup_memory(void *kernel_end) continue; free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start)); - printk("freeing pages %ld:%ld\n", start, end); + printk(KERN_INFO "freeing pages %ld:%ld\n", start, end); } /* Reserve the bootmap memory. */ reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size); - printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size)); + printk(KERN_INFO "reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size)); #ifdef CONFIG_BLK_DEV_INITRD initrd_start = INITRD_START; if (initrd_start) { initrd_end = initrd_start+INITRD_SIZE; - printk("Initial ramdisk at: 0x%p (%lu bytes)\n", + printk(KERN_INFO "Initial ramdisk at: 0x%p (%lu bytes)\n", (void *) initrd_start, INITRD_SIZE); if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) { if (!move_initrd(PFN_PHYS(max_low_pfn))) - printk("initrd extends beyond end of memory " + printk(KERN_INFO "initrd extends beyond end of memory " "(0x%08lx > 0x%p)\ndisabling initrd\n", initrd_end, phys_to_virt(PFN_PHYS(max_low_pfn))); @@ -662,7 +662,7 @@ setup_arch(char **cmdline_p) #endif "\n"); - printk("Command line: %s\n", command_line); + printk(KERN_INFO "Command line: %s\n", command_line); /* * Sync up the HAE. @@ -716,7 +716,7 @@ setup_arch(char **cmdline_p) */ if (hwrpb->max_asn != MAX_ASN) { - printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn); + printk(KERN_INFO "Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn); } /* @@ -1307,7 +1307,7 @@ external_cache_probe(int minsize, int wi cycles = read_mem_block(__va(0), stride, size); if (cycles > prev_cycles * 2) { /* Fine, we exceed the cache. */ - printk("%ldK Bcache detected; load hit latency %d " + printk(KERN_INFO "%ldK Bcache detected; load hit latency %d " "cycles, load miss latency %d cycles\n", size >> 11, prev_cycles, cycles); return CSHAPE(size >> 1, width, 1); --- a/arch/alpha/kernel/signal.c +++ b/arch/alpha/kernel/signal.c @@ -478,7 +478,7 @@ setup_frame(int sig, struct k_sigaction wrusp((unsigned long) frame); #if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n", + printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n", current->comm, current->pid, frame, regs->pc, regs->r26); #endif @@ -540,7 +540,7 @@ setup_rt_frame(int sig, struct k_sigacti wrusp((unsigned long) frame); #if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n", + printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n", current->comm, current->pid, frame, regs->pc, regs->r26); #endif --- a/arch/alpha/kernel/smc37c669.c +++ b/arch/alpha/kernel/smc37c669.c @@ -1898,45 +1898,45 @@ static unsigned int __init SMC37c669_get void __init SMC37c669_display_device_info ( void ) { if ( SMC37c669_is_device_enabled( SERIAL_0 ) ) { - printk( " Serial 0: Enabled [ Port 0x%x, IRQ %d ]\n", + printk(KERN_INFO " Serial 0: Enabled [ Port 0x%x, IRQ %d ]\n", local_config[ SERIAL_0 ].port1, local_config[ SERIAL_0 ].irq ); } else { - printk( " Serial 0: Disabled\n" ); + printk(KERN_INFO " Serial 0: Disabled\n" ); } if ( SMC37c669_is_device_enabled( SERIAL_1 ) ) { - printk( " Serial 1: Enabled [ Port 0x%x, IRQ %d ]\n", + printk(KERN_INFO " Serial 1: Enabled [ Port 0x%x, IRQ %d ]\n", local_config[ SERIAL_1 ].port1, local_config[ SERIAL_1 ].irq ); } else { - printk( " Serial 1: Disabled\n" ); + printk(KERN_INFO " Serial 1: Disabled\n" ); } if ( SMC37c669_is_device_enabled( PARALLEL_0 ) ) { - printk( " Parallel: Enabled [ Port 0x%x, IRQ %d/%d ]\n", + printk(KERN_INFO " Parallel: Enabled [ Port 0x%x, IRQ %d/%d ]\n", local_config[ PARALLEL_0 ].port1, local_config[ PARALLEL_0 ].irq, local_config[ PARALLEL_0 ].drq ); } else { - printk( " Parallel: Disabled\n" ); + printk(KERN_INFO " Parallel: Disabled\n" ); } if ( SMC37c669_is_device_enabled( FLOPPY_0 ) ) { - printk( " Floppy Ctrl: Enabled [ Port 0x%x, IRQ %d/%d ]\n", + printk(KERN_INFO " Floppy Ctrl: Enabled [ Port 0x%x, IRQ %d/%d ]\n", local_config[ FLOPPY_0 ].port1, local_config[ FLOPPY_0 ].irq, local_config[ FLOPPY_0 ].drq ); } else { - printk( " Floppy Ctrl: Disabled\n" ); + printk(KERN_INFO " Floppy Ctrl: Disabled\n" ); } if ( SMC37c669_is_device_enabled( IDE_0 ) ) { @@ -1946,7 +1946,7 @@ void __init SMC37c669_display_device_inf ); } else { - printk( " IDE 0: Disabled\n" ); + printk(KERN_INFO " IDE 0: Disabled\n" ); } } @@ -2452,7 +2452,7 @@ SMC37c669_dump_registers(void) { int i; for (i = 0; i <= 0x29; i++) - printk("-- CR%02x : %02x\n", i, SMC37c669_read_config(i)); + printk(KERN_DEBUG "-- CR%02x : %02x\n", i, SMC37c669_read_config(i)); } /*+ * ============================================================================ @@ -2542,13 +2542,13 @@ void __init SMC669_Init ( int index ) SMC37c669_display_device_info( ); #endif local_irq_restore(flags); - printk( "SMC37c669 Super I/O Controller found @ 0x%lx\n", + printk(KERN_INFO "SMC37c669 Super I/O Controller found @ 0x%lx\n", (unsigned long) SMC_base ); } else { local_irq_restore(flags); #if SMC_DEBUG - printk( "No SMC37c669 Super I/O Controller found\n" ); + printk(KERN_INFO "No SMC37c669 Super I/O Controller found\n" ); #endif } } --- a/arch/alpha/kernel/smc37c93x.c +++ b/arch/alpha/kernel/smc37c93x.c @@ -265,7 +265,7 @@ int __init SMC93x_Init(void) #endif SMCRunState(SMCUltraBase); local_irq_restore(flags); - printk("SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n", + printk(KERN_INFO "SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n", SMCUltraBase); return 1; } --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c @@ -150,7 +150,7 @@ int __init scoop_probe(struct platform_d platform_set_drvdata(pdev, devptr); - printk("Sharp Scoop Device found at 0x%08x -> 0x%08x\n",(unsigned int)mem->start,(unsigned int)devptr->base); + printk(KERN_INFO "Sharp Scoop Device found at 0x%08x -> 0x%08x\n",(unsigned int)mem->start,(unsigned int)devptr->base); SCOOP_REG(devptr->base, SCOOP_MCR) = 0x0140; reset_scoop(&pdev->dev); --- a/arch/arm/kernel/apm.c +++ b/arch/arm/kernel/apm.c @@ -516,6 +516,7 @@ static int kapmd(void *arg) static int __init apm_init(void) { + struct proc_dir_entry *proc_entry; int ret; if (apm_disabled) { @@ -532,7 +533,9 @@ static int __init apm_init(void) } #ifdef CONFIG_PROC_FS - create_proc_info_entry("apm", 0, NULL, apm_get_info); + proc_entry = create_proc_info_entry("apm", 0, NULL, apm_get_info); + if (proc_entry == NULL) + printk(KERN_WARNING "apm: Unable to create apm proc entry.\n"); #endif ret = misc_register(&apm_device); --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -48,7 +48,8 @@ static void pcibios_bus_report_status(st pci_write_config_word(dev, PCI_STATUS, status & status_mask); if (warn) - printk("(%s: %04X) ", pci_name(dev), status); + printk(KERN_WARNING "(%s: %04X) ", + pci_name(dev), status); } list_for_each_entry(dev, &bus->devices, bus_list) @@ -283,7 +284,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_C void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) { if (debug_pci) - printk("PCI: Assigning IRQ %02d to %s\n", irq, pci_name(dev)); + printk(KERN_DEBUG "PCI: Assigning IRQ %02d to %s\n", irq, pci_name(dev)); pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); } @@ -509,7 +510,7 @@ static u8 __devinit pcibios_swizzle(stru slot = sys->swizzle(dev, pin); if (debug_pci) - printk("PCI: %s swizzling pin %d => pin %d slot %d\n", + printk(KERN_DEBUG "PCI: %s swizzling pin %d => pin %d slot %d\n", pci_name(dev), oldpin, *pin, slot); return slot; @@ -527,7 +528,7 @@ static int pcibios_map_irq(struct pci_de irq = sys->map_irq(dev, slot, pin); if (debug_pci) - printk("PCI: %s mapping slot %d pin %d => irq %d\n", + printk(KERN_DEBUG "PCI: %s mapping slot %d pin %d => irq %d\n", pci_name(dev), slot, pin, irq); return irq; @@ -682,7 +683,7 @@ int pcibios_enable_device(struct pci_dev cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; if (cmd != old_cmd) { - printk("PCI: enabling device %s (%04x -> %04x)\n", + printk(KERN_INFO "PCI: enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); pci_write_config_word(dev, PCI_COMMAND, cmd); } --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -510,13 +510,13 @@ static void ecard_dump_irq_state(void) { ecard_t *ec; - printk("Expansion card IRQ state:\n"); + printk(KERN_DEBUG "Expansion card IRQ state:\n"); for (ec = cards; ec; ec = ec->next) { if (ec->slot_no == 8) continue; - printk(" %d: %sclaimed, ", + printk(KERN_DEBUG " %d: %sclaimed, ", ec->slot_no, ec->claimed ? "" : "not "); if (ec->ops && ec->ops->irqpending && @@ -777,9 +777,19 @@ static struct proc_dir_entry *proc_bus_e static void ecard_proc_init(void) { + struct proc_dir_entry *proc_entry; + proc_bus_ecard_dir = proc_mkdir("ecard", proc_bus); - create_proc_info_entry("devices", 0, proc_bus_ecard_dir, - get_ecard_dev_info); + if (proc_bus_ecard_dir == NULL) + printk(KERN_WARNING + "ecard: unable to create proc dir entry\n"); + else { + proc_entry = create_proc_info_entry("devices", 0, + proc_bus_ecard_dir, get_ecard_dev_info); + if (proc_entry == NULL) + printk(KERN_WARNING + "ecard: unable to create proc entry\n"); + } } #define ec_set_resource(ec,nr,st,sz) \ @@ -1069,7 +1079,7 @@ static int __init ecard_init(void) return ret; } - printk("Probing expansion cards\n"); + printk(KERN_INFO "Probing expansion cards\n"); for (slot = 0; slot < 8; slot ++) { if (ecard_probe(slot, ECARD_EASI) == -ENODEV) --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -10,7 +10,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include #include #include #include --- a/arch/arm26/Makefile +++ b/arch/arm26/Makefile @@ -13,7 +13,7 @@ CPPFLAGS_vmlinux.lds = -DTEXTADDR=$(TEXT OBJCOPYFLAGS :=-O binary -R .note -R .comment -S GZFLAGS :=-9 -ifeq ($(CONFIG_FRAME_POINTER),y) +ifdef CONFIG_FRAME_POINTER CFLAGS +=-fno-omit-frame-pointer -mno-sched-prolog endif @@ -21,7 +21,7 @@ CFLAGS_BOOT :=-mapcs-26 -mcpu=arm3 -msof CFLAGS +=-mapcs-26 -mcpu=arm3 -msoft-float -Uarm AFLAGS +=-mapcs-26 -mcpu=arm3 -msoft-float -ifeq ($(CONFIG_XIP_KERNEL),y) +ifdef CONFIG_XIP_KERNEL TEXTADDR := 0x03880000 DATAADDR := 0x02080000 else --- a/arch/arm26/kernel/ecard.c +++ b/arch/arm26/kernel/ecard.c @@ -522,9 +522,16 @@ static struct proc_dir_entry *proc_bus_e static void ecard_proc_init(void) { + struct proc_dir_entry *proc_entry; proc_bus_ecard_dir = proc_mkdir("ecard", proc_bus); - create_proc_info_entry("devices", 0, proc_bus_ecard_dir, - get_ecard_dev_info); + if (!proc_bus_ecard_dir) + printk(KERN_WARNING "ecard.c: unable to create ecard proc dir entry\n"); + else { + proc_entry = create_proc_info_entry("devices", 0, + proc_bus_ecard_dir, get_ecard_dev_info); + if (!proc_entry) + printk(KERN_WARNING "ecard.c: unable to create devices proc entry\n"); + } } #define ec_set_resource(ec,nr,st,sz,flg) \ --- a/arch/arm26/nwfpe/fpmodule.c +++ b/arch/arm26/nwfpe/fpmodule.c @@ -24,7 +24,6 @@ #include "fpa11.h" #include -#include #include /* XXX */ --- a/arch/cris/arch-v10/drivers/axisflashmap.c +++ b/arch/cris/arch-v10/drivers/axisflashmap.c @@ -397,7 +397,7 @@ static int __init init_axis_flash(void) struct partitiontable_head *ptable_head = NULL; struct partitiontable_entry *ptable; int use_default_ptable = 1; /* Until proven otherwise. */ - const char *pmsg = " /dev/flash%d at 0x%08x, size 0x%08x\n"; + const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n"; if (!(mymtd = flash_probe())) { /* There's no reason to use this module if no flash chip can --- a/arch/cris/arch-v10/kernel/kgdb.c +++ b/arch/cris/arch-v10/kernel/kgdb.c @@ -415,7 +415,6 @@ extern unsigned char executing_task; #define RUNLENMAX 64 /* Definition of all valid hexadecimal characters */ -static const char hexchars[] = "0123456789abcdef"; /* The inbound/outbound buffers used in packet I/O */ static char remcomInBuffer[BUFMAX]; @@ -557,8 +556,8 @@ gdb_cris_strtol (const char *s, char **e char *sd; int x = 0; - for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1) - x = x * base + (sd - hexchars); + for (s1 = (char*)s; (sd = gdb_cris_memchr(small_digits, *s1, base)) != NULL; ++s1) + x = x * base + (sd - small_digits); if (endptr) { --- a/arch/cris/arch-v32/drivers/pcf8563.c +++ b/arch/cris/arch-v32/drivers/pcf8563.c @@ -325,14 +325,12 @@ pcf8563_ioctl(struct inode *inode, struc int pcf8563_open(struct inode *inode, struct file *filp) { - MOD_INC_USE_COUNT; return 0; } int pcf8563_release(struct inode *inode, struct file *filp) { - MOD_DEC_USE_COUNT; return 0; } --- a/arch/cris/arch-v32/kernel/fasttimer.c +++ b/arch/cris/arch-v32/kernel/fasttimer.c @@ -604,23 +604,8 @@ void schedule_usleep(unsigned long us) #ifdef CONFIG_PROC_FS static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0) - ,int *eof, void *data_unused -#else - ,int unused -#endif - ); -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0) + ,int *eof, void *data_unused); static struct proc_dir_entry *fasttimer_proc_entry; -#else -static struct proc_dir_entry fasttimer_proc_entry = -{ - 0, 9, "fasttimer", - S_IFREG | S_IRUGO, 1, 0, 0, - 0, NULL /* ops -- default to array */, - &proc_fasttimer_read /* get_info */, -}; -#endif #endif /* CONFIG_PROC_FS */ #ifdef CONFIG_PROC_FS @@ -629,12 +614,7 @@ static struct proc_dir_entry fasttimer_p #define BIG_BUF_SIZE (500 + NUM_TIMER_STATS * 300) static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0) - ,int *eof, void *data_unused -#else - ,int unused -#endif - ) + ,int *eof, void *data_unused) { unsigned long flags; int i = 0; @@ -809,9 +789,7 @@ static int proc_fasttimer_read(char *buf memcpy(buf, bigbuf + offset, len); *start = buf; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0) *eof = 1; -#endif return len; } @@ -975,12 +953,8 @@ void fast_timer_init(void) printk("fast_timer_init()\n"); #ifdef CONFIG_PROC_FS -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0) if ((fasttimer_proc_entry = create_proc_entry( "fasttimer", 0, 0 ))) fasttimer_proc_entry->read_proc = proc_fasttimer_read; -#else - proc_register_dynamic(&proc_root, &fasttimer_proc_entry); -#endif #endif /* PROC_FS */ if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, SA_INTERRUPT, "fast timer int", NULL)) --- a/arch/cris/arch-v32/kernel/kgdb.c +++ b/arch/cris/arch-v32/kernel/kgdb.c @@ -465,7 +465,6 @@ void breakpoint(void); #define RUNLENMAX 64 /* Definition of all valid hexadecimal characters */ -static const char hexchars[] = "0123456789abcdef"; /* The inbound/outbound buffers used in packet I/O */ static char input_buffer[BUFMAX]; @@ -550,8 +549,8 @@ gdb_cris_strtol(const char *s, char **en char *sd; int x = 0; - for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1) - x = x * base + (sd - hexchars); + for (s1 = (char*)s; (sd = gdb_cris_memchr(small_digits, *s1, base)) != NULL; ++s1) + x = x * base + (sd - small_digits); if (endptr) { /* Unconverted suffix is stored in endptr unless endptr is NULL. */ @@ -660,7 +659,7 @@ read_register(char regno, unsigned int * static inline char highhex(int x) { - return hexchars[(x >> 4) & 0xf]; + return small_digits[(x >> 4) & 0xf]; } /* Returns the character equivalent of a nibble, bit 3, 2, 1, and 0 of a byte, @@ -668,7 +667,7 @@ highhex(int x) static inline char lowhex(int x) { - return hexchars[x & 0xf]; + return small_digits[x & 0xf]; } /* Returns the integer equivalent of a hexadecimal character. */ --- a/arch/frv/kernel/gdb-stub.c +++ b/arch/frv/kernel/gdb-stub.c @@ -182,8 +182,6 @@ extern volatile u32 __attribute__((secti static char input_buffer[BUFMAX]; static char output_buffer[BUFMAX]; -static const char hexchars[] = "0123456789abcdef"; - static const char *regnames[] = { "PSR ", "ISR ", "CCR ", "CCCR", "LR ", "LCR ", "PC ", "_stt", @@ -383,8 +381,8 @@ static int gdbstub_send_packet(char *buf } gdbstub_tx_char('#'); - gdbstub_tx_char(hexchars[checksum >> 4]); - gdbstub_tx_char(hexchars[checksum & 0xf]); + gdbstub_tx_char(small_digits[checksum >> 4]); + gdbstub_tx_char(small_digits[checksum & 0xf]); } while (gdbstub_rx_char(&ch,0), #ifdef GDBSTUB_DEBUG_PROTOCOL @@ -680,8 +678,8 @@ static unsigned char *mem2hex(const void if ((uint32_t)mem&1 && count>=1) { if (!gdbstub_read_byte(mem,ch)) return NULL; - *buf++ = hexchars[ch[0] >> 4]; - *buf++ = hexchars[ch[0] & 0xf]; + *buf++ = small_digits[ch[0] >> 4]; + *buf++ = small_digits[ch[0] & 0xf]; mem++; count--; } @@ -689,10 +687,10 @@ static unsigned char *mem2hex(const void if ((uint32_t)mem&3 && count>=2) { if (!gdbstub_read_word(mem,(uint16_t *)ch)) return NULL; - *buf++ = hexchars[ch[0] >> 4]; - *buf++ = hexchars[ch[0] & 0xf]; - *buf++ = hexchars[ch[1] >> 4]; - *buf++ = hexchars[ch[1] & 0xf]; + *buf++ = small_digits[ch[0] >> 4]; + *buf++ = small_digits[ch[0] & 0xf]; + *buf++ = small_digits[ch[1] >> 4]; + *buf++ = small_digits[ch[1] & 0xf]; mem += 2; count -= 2; } @@ -700,14 +698,14 @@ static unsigned char *mem2hex(const void while (count>=4) { if (!gdbstub_read_dword(mem,(uint32_t *)ch)) return NULL; - *buf++ = hexchars[ch[0] >> 4]; - *buf++ = hexchars[ch[0] & 0xf]; - *buf++ = hexchars[ch[1] >> 4]; - *buf++ = hexchars[ch[1] & 0xf]; - *buf++ = hexchars[ch[2] >> 4]; - *buf++ = hexchars[ch[2] & 0xf]; - *buf++ = hexchars[ch[3] >> 4]; - *buf++ = hexchars[ch[3] & 0xf]; + *buf++ = small_digits[ch[0] >> 4]; + *buf++ = small_digits[ch[0] & 0xf]; + *buf++ = small_digits[ch[1] >> 4]; + *buf++ = small_digits[ch[1] & 0xf]; + *buf++ = small_digits[ch[2] >> 4]; + *buf++ = small_digits[ch[2] & 0xf]; + *buf++ = small_digits[ch[3] >> 4]; + *buf++ = small_digits[ch[3] & 0xf]; mem += 4; count -= 4; } @@ -715,10 +713,10 @@ static unsigned char *mem2hex(const void if (count>=2) { if (!gdbstub_read_word(mem,(uint16_t *)ch)) return NULL; - *buf++ = hexchars[ch[0] >> 4]; - *buf++ = hexchars[ch[0] & 0xf]; - *buf++ = hexchars[ch[1] >> 4]; - *buf++ = hexchars[ch[1] & 0xf]; + *buf++ = small_digits[ch[0] >> 4]; + *buf++ = small_digits[ch[0] & 0xf]; + *buf++ = small_digits[ch[1] >> 4]; + *buf++ = small_digits[ch[1] & 0xf]; mem += 2; count -= 2; } @@ -726,8 +724,8 @@ static unsigned char *mem2hex(const void if (count>=1) { if (!gdbstub_read_byte(mem,ch)) return NULL; - *buf++ = hexchars[ch[0] >> 4]; - *buf++ = hexchars[ch[0] & 0xf]; + *buf++ = small_digits[ch[0] >> 4]; + *buf++ = small_digits[ch[0] & 0xf]; } *buf = 0; @@ -1448,22 +1446,22 @@ void gdbstub(int sigval) *ptr++ = 'O'; ptr = mem2hex(title, ptr, sizeof(title) - 1,0); - hx = hexchars[(brr & 0xf0000000) >> 28]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x0f000000) >> 24]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x00f00000) >> 20]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x000f0000) >> 16]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x0000f000) >> 12]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x00000f00) >> 8]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x000000f0) >> 4]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; - hx = hexchars[(brr & 0x0000000f)]; - *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf]; + hx = small_digits[(brr & 0xf0000000) >> 28]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x0f000000) >> 24]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x00f00000) >> 20]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x000f0000) >> 16]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x0000f000) >> 12]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x00000f00) >> 8]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x000000f0) >> 4]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; + hx = small_digits[(brr & 0x0000000f)]; + *ptr++ = small_digits[hx >> 4]; *ptr++ = small_digits[hx & 0xf]; ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0); *ptr = 0; @@ -1477,12 +1475,12 @@ void gdbstub(int sigval) /* Send trap type (converted to signal) */ *ptr++ = 'T'; - *ptr++ = hexchars[sigval >> 4]; - *ptr++ = hexchars[sigval & 0xf]; + *ptr++ = small_digits[sigval >> 4]; + *ptr++ = small_digits[sigval & 0xf]; /* Send Error PC */ - *ptr++ = hexchars[GDB_REG_PC >> 4]; - *ptr++ = hexchars[GDB_REG_PC & 0xf]; + *ptr++ = small_digits[GDB_REG_PC >> 4]; + *ptr++ = small_digits[GDB_REG_PC & 0xf]; *ptr++ = ':'; ptr = mem2hex(&__debug_frame->pc, ptr, 4, 0); *ptr++ = ';'; @@ -1490,8 +1488,8 @@ void gdbstub(int sigval) /* * Send frame pointer */ - *ptr++ = hexchars[GDB_REG_FP >> 4]; - *ptr++ = hexchars[GDB_REG_FP & 0xf]; + *ptr++ = small_digits[GDB_REG_FP >> 4]; + *ptr++ = small_digits[GDB_REG_FP & 0xf]; *ptr++ = ':'; ptr = mem2hex(&__debug_frame->fp, ptr, 4, 0); *ptr++ = ';'; @@ -1499,8 +1497,8 @@ void gdbstub(int sigval) /* * Send stack pointer */ - *ptr++ = hexchars[GDB_REG_SP >> 4]; - *ptr++ = hexchars[GDB_REG_SP & 0xf]; + *ptr++ = small_digits[GDB_REG_SP >> 4]; + *ptr++ = small_digits[GDB_REG_SP & 0xf]; *ptr++ = ':'; ptr = mem2hex(&__debug_frame->sp, ptr, 4, 0); *ptr++ = ';'; @@ -1525,8 +1523,8 @@ void gdbstub(int sigval) /* request repeat of last signal number */ case '?': output_buffer[0] = 'S'; - output_buffer[1] = hexchars[sigval >> 4]; - output_buffer[2] = hexchars[sigval & 0xf]; + output_buffer[1] = small_digits[sigval >> 4]; + output_buffer[2] = small_digits[sigval & 0xf]; output_buffer[3] = 0; break; @@ -2044,8 +2042,8 @@ void gdbstub_exit(int status) } gdbstub_tx_char('#'); - gdbstub_tx_char(hexchars[checksum >> 4]); - gdbstub_tx_char(hexchars[checksum & 0xf]); + gdbstub_tx_char(small_digits[checksum >> 4]); + gdbstub_tx_char(small_digits[checksum & 0xf]); /* make sure the output is flushed, or else RedBoot might clobber it */ gdbstub_tx_char('-'); --- a/arch/frv/kernel/setup.c +++ b/arch/frv/kernel/setup.c @@ -814,7 +814,7 @@ void __init setup_arch(char **cmdline_p) * - by now the stack is part of the init task */ printk("Memory %08lx-%08lx\n", memory_start, memory_end); - if (memory_start == memory_end) BUG(); + BUG_ON(memory_start == memory_end); init_mm.start_code = (unsigned long) &_stext; init_mm.end_code = (unsigned long) &_etext; --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -67,7 +67,7 @@ static void apic_pm_activate(void); */ void ack_bad_irq(unsigned int irq) { - printk("unexpected IRQ trap at vector %02x\n", irq); + printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq); /* * Currently unexpected vectors happen only on SMP and APIC. * We _must_ ack these because every local APIC has only N @@ -549,9 +549,9 @@ void __devinit setup_local_APIC(void) * ESR disabled - we can't do anything useful with the * errors anyway - mbligh */ - printk("Leaving ESR disabled.\n"); + printk(KERN_INFO "Leaving ESR disabled.\n"); else - printk("No ESR for 82489DX.\n"); + printk(KERN_INFO "No ESR for 82489DX.\n"); } if (nmi_watchdog == NMI_LOCAL_APIC) @@ -761,7 +761,7 @@ static int __init detect_init_APIC (void * APIC only if "lapic" specified. */ if (enable_local_apic <= 0) { - printk("Local APIC disabled by BIOS -- " + printk(KERN_INFO "Local APIC disabled by BIOS -- " "you can enable it with \"lapic\"\n"); return -1; } @@ -773,7 +773,7 @@ static int __init detect_init_APIC (void */ rdmsr(MSR_IA32_APICBASE, l, h); if (!(l & MSR_IA32_APICBASE_ENABLE)) { - printk("Local APIC disabled by BIOS -- reenabling.\n"); + printk(KERN_INFO "Local APIC disabled by BIOS -- reenabling.\n"); l &= ~MSR_IA32_APICBASE_BASE; l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; wrmsr(MSR_IA32_APICBASE, l, h); @@ -786,7 +786,7 @@ static int __init detect_init_APIC (void */ features = cpuid_edx(1); if (!(features & (1 << X86_FEATURE_APIC))) { - printk("Could not enable APIC!\n"); + printk(KERN_WARNING "Could not enable APIC!\n"); return -1; } set_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability); @@ -800,14 +800,14 @@ static int __init detect_init_APIC (void if (nmi_watchdog != NMI_NONE) nmi_watchdog = NMI_LOCAL_APIC; - printk("Found and enabled local APIC!\n"); + printk(KERN_INFO "Found and enabled local APIC!\n"); apic_pm_activate(); return 0; no_apic: - printk("No local APIC present or hardware disabled\n"); + printk(KERN_INFO "No local APIC present or hardware disabled\n"); return -1; } --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c @@ -29,7 +29,7 @@ EXPORT_PER_CPU_SYMBOL(irq_stat); */ void ack_bad_irq(unsigned int irq) { - printk("unexpected IRQ trap at vector %02x\n", irq); + printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq); } #endif @@ -69,7 +69,7 @@ fastcall unsigned int do_IRQ(struct pt_r __asm__ __volatile__("andl %%esp,%0" : "=r" (esp) : "0" (THREAD_SIZE - 1)); if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) { - printk("do_IRQ: stack overflow: %ld\n", + printk(KERN_ERR "do_IRQ: stack overflow: %ld\n", esp - sizeof(struct thread_info)); dump_stack(); } @@ -152,7 +152,7 @@ void irq_ctx_init(int cpu) softirq_ctx[cpu] = irqctx; - printk("CPU %u irqstacks, hard=%p soft=%p\n", + printk(KERN_INFO "CPU %u irqstacks, hard=%p soft=%p\n", cpu,hardirq_ctx[cpu],softirq_ctx[cpu]); } @@ -279,13 +279,13 @@ void fixup_irqs(cpumask_t map) cpus_and(mask, irq_affinity[irq], map); if (any_online_cpu(mask) == NR_CPUS) { - printk("Breaking affinity for irq %i\n", irq); + printk(KERN_ERR "Breaking affinity for irq %i\n", irq); mask = map; } if (irq_desc[irq].handler->set_affinity) irq_desc[irq].handler->set_affinity(irq, mask); else if (irq_desc[irq].action && !(warned++)) - printk("Cannot set affinity for irq %i\n", irq); + printk(KERN_ERR "Cannot set affinity for irq %i\n", irq); } #if 0 --- a/arch/m68k/atari/time.c +++ b/arch/m68k/atari/time.c @@ -16,6 +16,7 @@ #include #include #include +#include #include @@ -97,7 +98,7 @@ static void mste_write(struct MSTE_RTC * } while(0) -#define HWCLK_POLL_INTERVAL 5 +#define HWCLK_POLL_INTERVAL 50 /* ms */ int atari_mste_hwclk( int op, struct rtc_time *t ) { @@ -213,7 +214,7 @@ int atari_tt_hwclk( int op, struct rtc_t */ while( RTC_READ(RTC_FREQ_SELECT) & RTC_UIP ) - schedule_timeout_interruptible(HWCLK_POLL_INTERVAL); + msleep_interruptible(HWCLK_POLL_INTERVAL); local_irq_save(flags); RTC_WRITE( RTC_CONTROL, ctrl | RTC_SET ); --- a/arch/mips/arc/Makefile +++ b/arch/mips/arc/Makefile @@ -3,7 +3,7 @@ # lib-y += cmdline.o env.o file.o identify.o init.o \ - misc.o salone.o time.o tree.o + misc.o time.o tree.o lib-$(CONFIG_ARC_MEMORY) += memory.o lib-$(CONFIG_ARC_CONSOLE) += arc_con.o --- a/arch/mips/arc/salone.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Routines to load into memory and execute stand-along program images using - * ARCS PROM firmware. - * - * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) - */ -#include -#include - -LONG __init ArcLoad(CHAR *Path, ULONG TopAddr, ULONG *ExecAddr, ULONG *LowAddr) -{ - return ARC_CALL4(load, Path, TopAddr, ExecAddr, LowAddr); -} - -LONG __init ArcInvoke(ULONG ExecAddr, ULONG StackAddr, ULONG Argc, CHAR *Argv[], - CHAR *Envp[]) -{ - return ARC_CALL5(invoke, ExecAddr, StackAddr, Argc, Argv, Envp); -} - -LONG __init ArcExecute(CHAR *Path, LONG Argc, CHAR *Argv[], CHAR *Envp[]) -{ - return ARC_CALL4(exec, Path, Argc, Argv, Envp); -} --- a/arch/mips/galileo-boards/ev96100/puts.c +++ b/arch/mips/galileo-boards/ev96100/puts.c @@ -21,7 +21,6 @@ #define TIMEOUT 0xffff #undef SLOW_DOWN -static const char digits[16] = "0123456789abcdef"; static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE; @@ -118,7 +117,7 @@ void put64(uint64_t ul) do { cnt--; ch = (unsigned char) (ul >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } @@ -133,6 +132,6 @@ void put32(unsigned u) do { cnt--; ch = (unsigned char) (u >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } --- a/arch/mips/ite-boards/generic/puts.c +++ b/arch/mips/ite-boards/generic/puts.c @@ -38,7 +38,6 @@ #define TIMEOUT 0xffff #undef SLOW_DOWN -static const char digits[16] = "0123456789abcdef"; static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE; @@ -119,7 +118,7 @@ void put64(uint64_t ul) do { cnt--; ch = (unsigned char) (ul >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } @@ -134,6 +133,6 @@ void put32(unsigned u) do { cnt--; ch = (unsigned char) (u >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } --- a/arch/mips/jmr3927/common/puts.c +++ b/arch/mips/jmr3927/common/puts.c @@ -40,8 +40,6 @@ #define TIMEOUT 0xffffff #define SLOW_DOWN -static const char digits[16] = "0123456789abcdef"; - #ifdef SLOW_DOWN #define slow_down() { int k; for (k=0; k<10000; k++); } #else @@ -147,7 +145,7 @@ put64(uint64_t ul) do { cnt--; ch = (unsigned char)(ul >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } @@ -163,6 +161,6 @@ put32(unsigned u) do { cnt--; ch = (unsigned char)(u >> cnt * 4) & 0x0F; - putch(digits[ch]); + putch(small_digits[ch]); } while (cnt > 0); } --- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c +++ b/arch/mips/jmr3927/rbhma3100/kgdb_io.c @@ -39,8 +39,6 @@ #define TIMEOUT 0xffffff #define SLOW_DOWN -static const char digits[16] = "0123456789abcdef"; - #ifdef SLOW_DOWN #define slow_down() { int k; for (k=0; k<10000; k++); } #else --- a/arch/mips/kernel/gdb-stub.c +++ b/arch/mips/kernel/gdb-stub.c @@ -191,7 +191,6 @@ static char input_buffer[BUFMAX]; static char output_buffer[BUFMAX]; static int initialized; /* !0 means we've been initialized */ static int kgdb_started; -static const char hexchars[]="0123456789abcdef"; /* Used to prevent crashes in memory access. Note that they'll crash anyway if we haven't set up fault handlers yet... */ @@ -307,8 +306,8 @@ static void putpacket(char *buffer) } putDebugChar('#'); - putDebugChar(hexchars[checksum >> 4]); - putDebugChar(hexchars[checksum & 0xf]); + putDebugChar(small_digits[checksum >> 4]); + putDebugChar(small_digits[checksum & 0xf]); } while ((getDebugChar() & 0x7f) != '+'); @@ -329,8 +328,8 @@ static unsigned char *mem2hex(char *mem, while (count-- > 0) { if (kgdb_read_byte(mem++, &ch) != 0) return 0; - *buf++ = hexchars[ch >> 4]; - *buf++ = hexchars[ch & 0xf]; + *buf++ = small_digits[ch >> 4]; + *buf++ = small_digits[ch & 0xf]; } *buf = 0; @@ -753,14 +752,14 @@ void handle_exception (struct gdb_regs * * Send trap type (converted to signal) */ *ptr++ = 'T'; - *ptr++ = hexchars[sigval >> 4]; - *ptr++ = hexchars[sigval & 0xf]; + *ptr++ = small_digits[sigval >> 4]; + *ptr++ = small_digits[sigval & 0xf]; /* * Send Error PC */ - *ptr++ = hexchars[REG_EPC >> 4]; - *ptr++ = hexchars[REG_EPC & 0xf]; + *ptr++ = small_digits[REG_EPC >> 4]; + *ptr++ = small_digits[REG_EPC & 0xf]; *ptr++ = ':'; ptr = mem2hex((char *)®s->cp0_epc, ptr, sizeof(long), 0); *ptr++ = ';'; @@ -768,8 +767,8 @@ void handle_exception (struct gdb_regs * /* * Send frame pointer */ - *ptr++ = hexchars[REG_FP >> 4]; - *ptr++ = hexchars[REG_FP & 0xf]; + *ptr++ = small_digits[REG_FP >> 4]; + *ptr++ = small_digits[REG_FP & 0xf]; *ptr++ = ':'; ptr = mem2hex((char *)®s->reg30, ptr, sizeof(long), 0); *ptr++ = ';'; @@ -777,8 +776,8 @@ void handle_exception (struct gdb_regs * /* * Send stack pointer */ - *ptr++ = hexchars[REG_SP >> 4]; - *ptr++ = hexchars[REG_SP & 0xf]; + *ptr++ = small_digits[REG_SP >> 4]; + *ptr++ = small_digits[REG_SP & 0xf]; *ptr++ = ':'; ptr = mem2hex((char *)®s->reg29, ptr, sizeof(long), 0); *ptr++ = ';'; @@ -797,8 +796,8 @@ void handle_exception (struct gdb_regs * { case '?': output_buffer[0] = 'S'; - output_buffer[1] = hexchars[sigval >> 4]; - output_buffer[2] = hexchars[sigval & 0xf]; + output_buffer[1] = small_digits[sigval >> 4]; + output_buffer[2] = small_digits[sigval & 0xf]; output_buffer[3] = 0; break; --- a/arch/mips/pmc-sierra/yosemite/ht-irq.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright 2003 PMC-Sierra - * Author: Manish Lachwani (lachwani@pmc-sierra.com) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include -#include - -/* - * HT Bus fixup for the Titan - * XXX IRQ values need to change based on the board layout - */ -void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus) -{ - struct pci_bus *current_bus = bus; - struct pci_dev *devices; - struct list_head *devices_link; - - list_for_each(devices_link, &(current_bus->devices)) { - devices = pci_dev_b(devices_link); - if (devices == NULL) - continue; - } - - /* - * PLX and SPKT related changes go here - */ - -} --- a/arch/ppc/4xx_io/serial_sicc.c +++ b/arch/ppc/4xx_io/serial_sicc.c @@ -60,125 +60,121 @@ #include #include - #include - /* ----------------------------------------------------------------------------- * From STB03xxx SICC UART Specification * ----------------------------------------------------------------------------- * UART Register Offsets. */ -#define BL_SICC_LSR 0x0000000 /* line status register read/clear */ -#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */ -#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */ -#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */ -#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */ -#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */ -#define BL_SICC_LCR 0x0000006 /* control register r/w */ -#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */ -#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */ -#define BL_SICC_RBR 0x0000009 /* receive buffer r */ -#define BL_SICC_TBR 0x0000009 /* transmit buffer w */ -#define BL_SICC_CTL2 0x000000A /* added for Vesta */ -#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */ +#define BL_SICC_LSR 0x0000000 /* line status register read/clear */ +#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */ +#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */ +#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */ +#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */ +#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */ +#define BL_SICC_LCR 0x0000006 /* control register r/w */ +#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */ +#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */ +#define BL_SICC_RBR 0x0000009 /* receive buffer r */ +#define BL_SICC_TBR 0x0000009 /* transmit buffer w */ +#define BL_SICC_CTL2 0x000000A /* added for Vesta */ +#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */ /* masks and definitions for serial port control register */ -#define _LCR_LM_MASK 0xc0 /* loop back modes */ -#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */ -#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */ -#define _LCR_DB_MASK 0x08 /* data bits mask */ -#define _LCR_PE_MASK 0x04 /* parity enable */ -#define _LCR_PTY_MASK 0x02 /* parity */ -#define _LCR_SB_MASK 0x01 /* stop bit mask */ - -#define _LCR_LM_NORM 0x00 /* normal operation */ -#define _LCR_LM_LOOP 0x40 /* internal loopback mode */ -#define _LCR_LM_ECHO 0x80 /* automatic echo mode */ -#define _LCR_LM_RES 0xc0 /* reserved */ - -#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */ -#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */ -#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */ -#define _LCR_DB_7_BITS 0x00 /* 7 data bits */ -#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */ -#define _LCR_PE_DISABLE 0x00 /* parity disabled */ -#define _LCR_PTY_EVEN 0x00 /* even parity */ -#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */ -#define _LCR_SB_1_BIT 0x00 /* one stop bit */ -#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */ +#define _LCR_LM_MASK 0xc0 /* loop back modes */ +#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */ +#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */ +#define _LCR_DB_MASK 0x08 /* data bits mask */ +#define _LCR_PE_MASK 0x04 /* parity enable */ +#define _LCR_PTY_MASK 0x02 /* parity */ +#define _LCR_SB_MASK 0x01 /* stop bit mask */ + +#define _LCR_LM_NORM 0x00 /* normal operation */ +#define _LCR_LM_LOOP 0x40 /* internal loopback mode */ +#define _LCR_LM_ECHO 0x80 /* automatic echo mode */ +#define _LCR_LM_RES 0xc0 /* reserved */ + +#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */ +#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */ +#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */ +#define _LCR_DB_7_BITS 0x00 /* 7 data bits */ +#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */ +#define _LCR_PE_DISABLE 0x00 /* parity disabled */ +#define _LCR_PTY_EVEN 0x00 /* even parity */ +#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */ +#define _LCR_SB_1_BIT 0x00 /* one stop bit */ +#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */ /* serial port handshake register */ -#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */ -#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */ -#define _HSR_DIS_ACT 0x00 /* dsr input is active */ -#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */ -#define _HSR_CS_ACT 0x00 /* cts input is active */ -#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */ +#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */ +#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */ +#define _HSR_DIS_ACT 0x00 /* dsr input is active */ +#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */ +#define _HSR_CS_ACT 0x00 /* cts input is active */ +#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */ /* serial port line status register */ -#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */ -#define _LSR_FE_MASK 0x40 /* framing error */ -#define _LSR_OE_MASK 0x20 /* overrun error */ -#define _LSR_PE_MASK 0x10 /* parity error */ -#define _LSR_LB_MASK 0x08 /* line break */ -#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */ -#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */ - -#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */ -#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */ -#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */ -#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */ -#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */ -#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */ -#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */ -#define _LSR_TX_ALL 0x06 /* all physical transmit is done */ +#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */ +#define _LSR_FE_MASK 0x40 /* framing error */ +#define _LSR_OE_MASK 0x20 /* overrun error */ +#define _LSR_PE_MASK 0x10 /* parity error */ +#define _LSR_LB_MASK 0x08 /* line break */ +#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */ +#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */ + +#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */ +#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */ +#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */ +#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */ +#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */ +#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */ +#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */ +#define _LSR_TX_ALL 0x06 /* all physical transmit is done */ #define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \ _LSR_PE_MASK ) /* serial port receiver command register */ -#define _RCR_ER_MASK 0x80 /* enable receiver mask */ -#define _RCR_DME_MASK 0x60 /* dma mode */ -#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */ -#define _RCR_PME_MASK 0x08 /* pause mode mask */ - -#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */ -#define _RCR_DME_DISABLE 0x00 /* dma disabled */ -#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/ -#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */ -#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */ -#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */ -#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */ +#define _RCR_ER_MASK 0x80 /* enable receiver mask */ +#define _RCR_DME_MASK 0x60 /* dma mode */ +#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */ +#define _RCR_PME_MASK 0x08 /* pause mode mask */ + +#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */ +#define _RCR_DME_DISABLE 0x00 /* dma disabled */ +#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled */ +#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */ +#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */ +#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */ +#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */ /* serial port transmit command register */ -#define _TxCR_ET_MASK 0x80 /* transmiter enable mask */ -#define _TxCR_DME_MASK 0x60 /* dma mode mask */ -#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */ -#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */ -#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */ -#define _TxCR_TB_MASK 0x02 /* transmit break mask */ - -#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmiter enabled */ -#define _TxCR_DME_DISABLE 0x00 /* transmiter disabled, TBR intr disabled */ -#define _TxCR_DME_TBR 0x20 /* transmiter disabled, TBR intr enabled */ -#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */ -#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */ +#define _TxCR_ET_MASK 0x80 /* transmiter enable mask */ +#define _TxCR_DME_MASK 0x60 /* dma mode mask */ +#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */ +#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */ +#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */ +#define _TxCR_TB_MASK 0x02 /* transmit break mask */ + +#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmiter enabled */ +#define _TxCR_DME_DISABLE 0x00 /* transmiter disabled, TBR intr disabled */ +#define _TxCR_DME_TBR 0x20 /* transmiter disabled, TBR intr enabled */ +#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */ +#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */ /* serial ctl reg 2 - added for Vesta */ -#define _CTL2_EXTERN 0x80 /* */ -#define _CTL2_USEFIFO 0x40 /* */ -#define _CTL2_RESETRF 0x08 /* */ -#define _CTL2_RESETTF 0x04 /* */ - - +#define _CTL2_EXTERN 0x80 /* */ +#define _CTL2_USEFIFO 0x40 /* */ +#define _CTL2_RESETRF 0x08 /* */ +#define _CTL2_RESETTF 0x04 /* */ #define SERIAL_SICC_NAME "ttySICC" #define SERIAL_SICC_MAJOR 150 @@ -225,46 +221,46 @@ static u_char *tmp_buf; #define EVT_WRITE_WAKEUP 0 struct SICC_icount { - __u32 cts; - __u32 dsr; - __u32 rng; - __u32 dcd; - __u32 rx; - __u32 tx; - __u32 frame; - __u32 overrun; - __u32 parity; - __u32 brk; - __u32 buf_overrun; + __u32 cts; + __u32 dsr; + __u32 rng; + __u32 dcd; + __u32 rx; + __u32 tx; + __u32 frame; + __u32 overrun; + __u32 parity; + __u32 brk; + __u32 buf_overrun; }; /* * Static information about the port */ struct SICC_port { - unsigned int uart_base; - unsigned int uart_base_phys; - unsigned int irqrx; - unsigned int irqtx; - unsigned int uartclk; - unsigned int fifosize; - unsigned int tiocm_support; - void (*set_mctrl)(struct SICC_port *, u_int mctrl); + unsigned int uart_base; + unsigned int uart_base_phys; + unsigned int irqrx; + unsigned int irqtx; + unsigned int uartclk; + unsigned int fifosize; + unsigned int tiocm_support; + void (*set_mctrl) (struct SICC_port *, u_int mctrl); }; /* * This is the state information which is persistent across opens */ struct SICC_state { - struct SICC_icount icount; - unsigned int line; - unsigned int close_delay; - unsigned int closing_wait; - unsigned int custom_divisor; - unsigned int flags; - int count; - struct SICC_info *info; - spinlock_t sicc_lock; + struct SICC_icount icount; + unsigned int line; + unsigned int close_delay; + unsigned int closing_wait; + unsigned int custom_divisor; + unsigned int flags; + int count; + struct SICC_info *info; + spinlock_t sicc_lock; }; #define SICC_XMIT_SIZE 1024 @@ -272,53 +268,52 @@ struct SICC_state { * This is the state information which is only valid when the port is open. */ struct SICC_info { - struct SICC_port *port; - struct SICC_state *state; - struct tty_struct *tty; - unsigned char x_char; - unsigned char old_status; - unsigned char read_status_mask; - unsigned char ignore_status_mask; - struct circ_buf xmit; - unsigned int flags; + struct SICC_port *port; + struct SICC_state *state; + struct tty_struct *tty; + unsigned char x_char; + unsigned char old_status; + unsigned char read_status_mask; + unsigned char ignore_status_mask; + struct circ_buf xmit; + unsigned int flags; #ifdef SUPPORT_SYSRQ - unsigned long sysrq; + unsigned long sysrq; #endif - unsigned int event; - unsigned int timeout; - unsigned int lcr_h; - unsigned int mctrl; - int blocked_open; - - struct tasklet_struct tlet; - - wait_queue_head_t open_wait; - wait_queue_head_t close_wait; - wait_queue_head_t delta_msr_wait; + unsigned int event; + unsigned int timeout; + unsigned int lcr_h; + unsigned int mctrl; + int blocked_open; + + struct tasklet_struct tlet; + + wait_queue_head_t open_wait; + wait_queue_head_t close_wait; + wait_queue_head_t delta_msr_wait; }; #ifdef CONFIG_SERIAL_SICC_CONSOLE static struct console siccuart_cons; #endif -static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios); +static void siccuart_change_speed(struct SICC_info *info, + struct termios *old_termios); static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout); - - static void powerpcMtcic_cr(unsigned long value) { - mtdcr(DCRN_CICCR, value); + mtdcr(DCRN_CICCR, value); } static unsigned long powerpcMfcic_cr(void) { - return mfdcr(DCRN_CICCR); + return mfdcr(DCRN_CICCR); } static unsigned long powerpcMfclkgpcr(void) { - return mfdcr(DCRN_SCCR); + return mfdcr(DCRN_SCCR); } static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl) @@ -326,379 +321,370 @@ static void sicc_set_mctrl_null(struct S } static struct SICC_port sicc_ports[SERIAL_SICC_NR] = { - { - .uart_base = 0, - .uart_base_phys = SICC0_IO_BASE, - .irqrx = SICC0_INTRX, - .irqtx = SICC0_INTTX, + { + .uart_base = 0, + .uart_base_phys = SICC0_IO_BASE, + .irqrx = SICC0_INTRX, + .irqtx = SICC0_INTTX, // .uartclk = 0, - .fifosize = 1, - .set_mctrl = sicc_set_mctrl_null, - } + .fifosize = 1, + .set_mctrl = sicc_set_mctrl_null, + } }; static struct SICC_state sicc_state[SERIAL_SICC_NR]; static void siccuart_enable_rx_interrupt(struct SICC_info *info) { - unsigned char cr; + unsigned char cr; - cr = readb(info->port->uart_base+BL_SICC_RCR); - cr &= ~_RCR_DME_MASK; - cr |= _RCR_DME_RXRDY; - writeb(cr, info->port->uart_base+BL_SICC_RCR); + cr = readb(info->port->uart_base + BL_SICC_RCR); + cr &= ~_RCR_DME_MASK; + cr |= _RCR_DME_RXRDY; + writeb(cr, info->port->uart_base + BL_SICC_RCR); } static void siccuart_disable_rx_interrupt(struct SICC_info *info) { - unsigned char cr; + unsigned char cr; - cr = readb(info->port->uart_base+BL_SICC_RCR); - cr &= ~_RCR_DME_MASK; - cr |= _RCR_DME_DISABLE; - writeb(cr, info->port->uart_base+BL_SICC_RCR); + cr = readb(info->port->uart_base + BL_SICC_RCR); + cr &= ~_RCR_DME_MASK; + cr |= _RCR_DME_DISABLE; + writeb(cr, info->port->uart_base + BL_SICC_RCR); } - static void siccuart_enable_tx_interrupt(struct SICC_info *info) { - unsigned char cr; + unsigned char cr; - cr = readb(info->port->uart_base+BL_SICC_TxCR); - cr &= ~_TxCR_DME_MASK; - cr |= _TxCR_DME_TBR; - writeb(cr, info->port->uart_base+BL_SICC_TxCR); + cr = readb(info->port->uart_base + BL_SICC_TxCR); + cr &= ~_TxCR_DME_MASK; + cr |= _TxCR_DME_TBR; + writeb(cr, info->port->uart_base + BL_SICC_TxCR); } static void siccuart_disable_tx_interrupt(struct SICC_info *info) { - unsigned char cr; + unsigned char cr; - cr = readb(info->port->uart_base+BL_SICC_TxCR); - cr &= ~_TxCR_DME_MASK; - cr |= _TxCR_DME_DISABLE; - writeb(cr, info->port->uart_base+BL_SICC_TxCR); + cr = readb(info->port->uart_base + BL_SICC_TxCR); + cr &= ~_TxCR_DME_MASK; + cr |= _TxCR_DME_DISABLE; + writeb(cr, info->port->uart_base + BL_SICC_TxCR); } - static void siccuart_stop(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - /* disable interrupts while stopping serial port interrupts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - siccuart_disable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); + /* disable interrupts while stopping serial port interrupts */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + siccuart_disable_tx_interrupt(info); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); } static void siccuart_start(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - /* disable interrupts while starting serial port interrupts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (info->xmit.head != info->xmit.tail - && info->xmit.buf) - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); + /* disable interrupts while starting serial port interrupts */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + if (info->xmit.head != info->xmit.tail && info->xmit.buf) + siccuart_enable_tx_interrupt(info); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); } - /* * This routine is used by the interrupt handler to schedule * processing in the software interrupt portion of the driver. */ static void siccuart_event(struct SICC_info *info, int event) { - info->event |= 1 << event; - tasklet_schedule(&info->tlet); + info->event |= 1 << event; + tasklet_schedule(&info->tlet); } -static void -siccuart_rx_chars(struct SICC_info *info, struct pt_regs *regs) +static void siccuart_rx_chars(struct SICC_info *info, struct pt_regs *regs) { - struct tty_struct *tty = info->tty; - unsigned int status, ch, rsr, flg, ignored = 0; - struct SICC_icount *icount = &info->state->icount; - struct SICC_port *port = info->port; - - status = readb(port->uart_base+BL_SICC_LSR ); - while (status & _LSR_RBR_FULL) { - ch = readb(port->uart_base+BL_SICC_RBR); - - if (tty->flip.count >= TTY_FLIPBUF_SIZE) - goto ignore_char; - icount->rx++; - - flg = TTY_NORMAL; - - /* - * Note that the error handling code is - * out of the main execution path - */ - rsr = readb(port->uart_base+BL_SICC_LSR); - if (rsr & _LSR_RX_ERR) - goto handle_error; + struct tty_struct *tty = info->tty; + unsigned int status, ch, rsr, flg, ignored = 0; + struct SICC_icount *icount = &info->state->icount; + struct SICC_port *port = info->port; + + status = readb(port->uart_base + BL_SICC_LSR); + while (status & _LSR_RBR_FULL) { + ch = readb(port->uart_base + BL_SICC_RBR); + + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + goto ignore_char; + icount->rx++; + + flg = TTY_NORMAL; + + /* + * Note that the error handling code is + * out of the main execution path + */ + rsr = readb(port->uart_base + BL_SICC_LSR); + if (rsr & _LSR_RX_ERR) + goto handle_error; #ifdef SUPPORT_SYSRQ - if (info->sysrq) { - if (ch && time_before(jiffies, info->sysrq)) { - handle_sysrq(ch, regs, NULL); - info->sysrq = 0; - goto ignore_char; - } - info->sysrq = 0; - } + if (info->sysrq) { + if (ch && time_before(jiffies, info->sysrq)) { + handle_sysrq(ch, regs, NULL); + info->sysrq = 0; + goto ignore_char; + } + info->sysrq = 0; + } #endif - error_return: - *tty->flip.flag_buf_ptr++ = flg; - *tty->flip.char_buf_ptr++ = ch; - tty->flip.count++; - ignore_char: - status = readb(port->uart_base+BL_SICC_LSR ); - } -out: - tty_flip_buffer_push(tty); - return; - -handle_error: - if (rsr & _LSR_LB_BREAK) { - rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK); - icount->brk++; + error_return: + *tty->flip.flag_buf_ptr++ = flg; + *tty->flip.char_buf_ptr++ = ch; + tty->flip.count++; + ignore_char: + status = readb(port->uart_base + BL_SICC_LSR); + } + out: + tty_flip_buffer_push(tty); + return; + + handle_error: + if (rsr & _LSR_LB_BREAK) { + rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK); + icount->brk++; #ifdef SUPPORT_SYSRQ - if (info->state->line == siccuart_cons.index) { - if (!info->sysrq) { - info->sysrq = jiffies + HZ*5; - goto ignore_char; - } - } + if (info->state->line == siccuart_cons.index) { + if (!info->sysrq) { + info->sysrq = jiffies + HZ * 5; + goto ignore_char; + } + } #endif - } else if (rsr & _LSR_PE_MASK) - icount->parity++; - else if (rsr & _LSR_FE_MASK) - icount->frame++; - if (rsr & _LSR_OE_MASK) - icount->overrun++; - - if (rsr & info->ignore_status_mask) { - if (++ignored > 100) - goto out; - goto ignore_char; - } - rsr &= info->read_status_mask; - - if (rsr & _LSR_LB_BREAK) - flg = TTY_BREAK; - else if (rsr & _LSR_PE_MASK) - flg = TTY_PARITY; - else if (rsr & _LSR_FE_MASK) - flg = TTY_FRAME; - - if (rsr & _LSR_OE_MASK) { - /* - * CHECK: does overrun affect the current character? - * ASSUMPTION: it does not. - */ - *tty->flip.flag_buf_ptr++ = flg; - *tty->flip.char_buf_ptr++ = ch; - tty->flip.count++; - if (tty->flip.count >= TTY_FLIPBUF_SIZE) - goto ignore_char; - ch = 0; - flg = TTY_OVERRUN; - } + } else if (rsr & _LSR_PE_MASK) + icount->parity++; + else if (rsr & _LSR_FE_MASK) + icount->frame++; + if (rsr & _LSR_OE_MASK) + icount->overrun++; + + if (rsr & info->ignore_status_mask) { + if (++ignored > 100) + goto out; + goto ignore_char; + } + rsr &= info->read_status_mask; + + if (rsr & _LSR_LB_BREAK) + flg = TTY_BREAK; + else if (rsr & _LSR_PE_MASK) + flg = TTY_PARITY; + else if (rsr & _LSR_FE_MASK) + flg = TTY_FRAME; + + if (rsr & _LSR_OE_MASK) { + /* + * CHECK: does overrun affect the current character? + * ASSUMPTION: it does not. + */ + *tty->flip.flag_buf_ptr++ = flg; + *tty->flip.char_buf_ptr++ = ch; + tty->flip.count++; + if (tty->flip.count >= TTY_FLIPBUF_SIZE) + goto ignore_char; + ch = 0; + flg = TTY_OVERRUN; + } #ifdef SUPPORT_SYSRQ - info->sysrq = 0; + info->sysrq = 0; #endif - goto error_return; + goto error_return; } static void siccuart_tx_chars(struct SICC_info *info) { - struct SICC_port *port = info->port; - int count; - unsigned char status; - - - if (info->x_char) { - writeb(info->x_char, port->uart_base+ BL_SICC_TBR); - info->state->icount.tx++; - info->x_char = 0; - return; - } - if (info->xmit.head == info->xmit.tail - || info->tty->stopped - || info->tty->hw_stopped) { - siccuart_disable_tx_interrupt(info); - writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR); - return; - } - - count = port->fifosize; - do { - writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR); - info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1); - info->state->icount.tx++; - if (info->xmit.head == info->xmit.tail) - break; - } while (--count > 0); - - if (CIRC_CNT(info->xmit.head, - info->xmit.tail, - SICC_XMIT_SIZE) < WAKEUP_CHARS) - siccuart_event(info, EVT_WRITE_WAKEUP); - - if (info->xmit.head == info->xmit.tail) { - siccuart_disable_tx_interrupt(info); - } + struct SICC_port *port = info->port; + int count; + unsigned char status; + + if (info->x_char) { + writeb(info->x_char, port->uart_base + BL_SICC_TBR); + info->state->icount.tx++; + info->x_char = 0; + return; + } + if (info->xmit.head == info->xmit.tail + || info->tty->stopped || info->tty->hw_stopped) { + siccuart_disable_tx_interrupt(info); + writeb(status & (~_LSR_RBR_MASK), + port->uart_base + BL_SICC_LSR); + return; + } + + count = port->fifosize; + do { + writeb(info->xmit.buf[info->xmit.tail], + port->uart_base + BL_SICC_TBR); + info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1); + info->state->icount.tx++; + if (info->xmit.head == info->xmit.tail) + break; + } while (--count > 0); + + if (CIRC_CNT(info->xmit.head, + info->xmit.tail, SICC_XMIT_SIZE) < WAKEUP_CHARS) + siccuart_event(info, EVT_WRITE_WAKEUP); + + if (info->xmit.head == info->xmit.tail) { + siccuart_disable_tx_interrupt(info); + } } - static irqreturn_t siccuart_int_rx(int irq, void *dev_id, struct pt_regs *regs) { - struct SICC_info *info = dev_id; - siccuart_rx_chars(info, regs); - return IRQ_HANDLED; + struct SICC_info *info = dev_id; + siccuart_rx_chars(info, regs); + return IRQ_HANDLED; } - static irqreturn_t siccuart_int_tx(int irq, void *dev_id, struct pt_regs *regs) { - struct SICC_info *info = dev_id; - siccuart_tx_chars(info); - return IRQ_HANDLED; + struct SICC_info *info = dev_id; + siccuart_tx_chars(info); + return IRQ_HANDLED; } static void siccuart_tasklet_action(unsigned long data) { - struct SICC_info *info = (struct SICC_info *)data; - struct tty_struct *tty; + struct SICC_info *info = (struct SICC_info *)data; + struct tty_struct *tty; - tty = info->tty; - if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event)) - return; - - if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && - tty->ldisc.write_wakeup) - (tty->ldisc.write_wakeup)(tty); - wake_up_interruptible(&tty->write_wait); + tty = info->tty; + if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event)) + return; + + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup) (tty); + wake_up_interruptible(&tty->write_wait); } static int siccuart_startup(struct SICC_info *info) { - unsigned long flags; - unsigned long page; - int retval = 0; - - if (info->flags & ASYNC_INITIALIZED) { - return 0; - } - - page = get_zeroed_page(GFP_KERNEL); - if (!page) - return -ENOMEM; - - if (info->port->uart_base == 0) - info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE); - if (info->port->uart_base == 0) { - free_page(page); - return -ENOMEM; - } - - /* lock access to info while doing setup */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - - if (info->xmit.buf) - free_page(page); - else - info->xmit.buf = (unsigned char *) page; - - - info->mctrl = 0; - if (info->tty->termios->c_cflag & CBAUD) - info->mctrl = TIOCM_RTS | TIOCM_DTR; - info->port->set_mctrl(info->port, info->mctrl); - - /* - * initialise the old status of the modem signals - */ - info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY; - - - if (info->tty) - clear_bit(TTY_IO_ERROR, &info->tty->flags); - info->xmit.head = info->xmit.tail = 0; - - /* - * Set up the tty->alt_speed kludge - */ - if (info->tty) { - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - info->tty->alt_speed = 57600; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - info->tty->alt_speed = 115200; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - info->tty->alt_speed = 230400; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - info->tty->alt_speed = 460800; - } - - - writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA - - - /* - * and set the speed of the serial port - */ - siccuart_change_speed(info, 0); - - // enable rx/tx ports - writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR); - writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR); - - readb(info->port->uart_base + BL_SICC_RBR); // clear rx port - - writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */ - - /* - * Finally, enable interrupts - */ - - /* - * Allocate the IRQ - */ - retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info); - if (retval) { - if (capable(CAP_SYS_ADMIN)) { - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - retval = 0; - } - goto errout; - } - retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info); - if (retval) { - if (capable(CAP_SYS_ADMIN)) { - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - retval = 0; - } - free_irq(info->port->irqrx, info); - goto errout; - } - - siccuart_enable_rx_interrupt(info); - - info->flags |= ASYNC_INITIALIZED; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return 0; - - -errout: - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return retval; + unsigned long flags; + unsigned long page; + int retval = 0; + + if (info->flags & ASYNC_INITIALIZED) { + return 0; + } + + page = get_zeroed_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + + if (info->port->uart_base == 0) + info->port->uart_base = + (int)ioremap(info->port->uart_base_phys, PAGE_SIZE); + if (info->port->uart_base == 0) { + free_page(page); + return -ENOMEM; + } + + /* lock access to info while doing setup */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + + if (info->xmit.buf) + free_page(page); + else + info->xmit.buf = (unsigned char *)page; + + info->mctrl = 0; + if (info->tty->termios->c_cflag & CBAUD) + info->mctrl = TIOCM_RTS | TIOCM_DTR; + info->port->set_mctrl(info->port, info->mctrl); + + /* + * initialise the old status of the modem signals + */ + info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY; + + if (info->tty) + clear_bit(TTY_IO_ERROR, &info->tty->flags); + info->xmit.head = info->xmit.tail = 0; + + /* + * Set up the tty->alt_speed kludge + */ + if (info->tty) { + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) + info->tty->alt_speed = 57600; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) + info->tty->alt_speed = 115200; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) + info->tty->alt_speed = 230400; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) + info->tty->alt_speed = 460800; + } + + writeb(0x00, info->port->uart_base + BL_SICC_IrCR); // disable IrDA + + /* + * and set the speed of the serial port + */ + siccuart_change_speed(info, 0); + + // enable rx/tx ports + writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD */ , + info->port->uart_base + BL_SICC_RCR); + writeb(_TxCR_ET_ENABLE, info->port->uart_base + BL_SICC_TxCR); + + readb(info->port->uart_base + BL_SICC_RBR); // clear rx port + + writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */ + + /* + * Finally, enable interrupts + */ + + /* + * Allocate the IRQ + */ + retval = + request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info); + if (retval) { + if (capable(CAP_SYS_ADMIN)) { + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + retval = 0; + } + goto errout; + } + retval = + request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info); + if (retval) { + if (capable(CAP_SYS_ADMIN)) { + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + retval = 0; + } + free_irq(info->port->irqrx, info); + goto errout; + } + + siccuart_enable_rx_interrupt(info); + + info->flags |= ASYNC_INITIALIZED; + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + return 0; + + errout: + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + return retval; } /* @@ -707,302 +693,299 @@ errout: */ static void siccuart_shutdown(struct SICC_info *info) { - unsigned long flags; + unsigned long flags; - if (!(info->flags & ASYNC_INITIALIZED)) - return; + if (!(info->flags & ASYNC_INITIALIZED)) + return; - /* lock while shutting down port */ - spin_lock_irqsave(&info->state->sicc_lock,flags); /* Disable interrupts */ + /* lock while shutting down port */ + spin_lock_irqsave(&info->state->sicc_lock, flags); /* Disable interrupts */ - /* - * clear delta_msr_wait queue to avoid mem leaks: we may free the irq - * here so the queue might never be woken up - */ - wake_up_interruptible(&info->delta_msr_wait); - - /* - * disable all interrupts, disable the port - */ - siccuart_disable_rx_interrupt(info); - siccuart_disable_tx_interrupt(info); - - /* - * Free the IRQ - */ - free_irq(info->port->irqtx, info); - free_irq(info->port->irqrx, info); - - if (info->xmit.buf) { - unsigned long pg = (unsigned long) info->xmit.buf; - info->xmit.buf = NULL; - free_page(pg); - } - - - if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) - info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS); - info->port->set_mctrl(info->port, info->mctrl); - - /* kill off our tasklet */ - tasklet_kill(&info->tlet); - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - - info->flags &= ~ASYNC_INITIALIZED; - - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - - -static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios) -{ - unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits; - unsigned long flags; - - if (!info->tty || !info->tty->termios) - return; - - cflag = info->tty->termios->c_cflag; - - pr_debug("siccuart_set_cflag(0x%x) called\n", cflag); - /* byte size and parity */ - switch (cflag & CSIZE) { - case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break; - default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8 - } - if (cflag & CSTOPB) { - lcr_h |= _LCR_SB_2_BIT; - bits ++; - } - if (cflag & PARENB) { - lcr_h |= _LCR_PE_ENABLE; - bits++; - if (!(cflag & PARODD)) - lcr_h |= _LCR_PTY_ODD; - else - lcr_h |= _LCR_PTY_EVEN; - } - - do { - /* Determine divisor based on baud rate */ - baud = tty_get_baud_rate(info->tty); - if (!baud) - baud = 9600; - - - { - // here is ppc403SetBaud(com_port, baud); - unsigned long divisor, clockSource, temp; - - /* Ensure CICCR[7] is 0 to select Internal Baud Clock */ - powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF)); - - /* Determine Internal Baud Clock Frequency */ - /* powerpcMfclkgpcr() reads DCR 0x120 - the*/ - /* SCCR (Serial Clock Control Register) on Vesta */ - temp = powerpcMfclkgpcr(); - - if(temp & 0x00000080) { - clockSource = 324000000; - } - else { - clockSource = 216000000; - } - clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18); - divisor = clockSource/(16*baud) - 1; - /* divisor has only 12 bits of resolution */ - if(divisor>0x00000FFF){ - divisor=0x00000FFF; - } - - quot = divisor; - } - - if (baud == 38400 && - ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)) - quot = info->state->custom_divisor; - - if (!quot && old_termios) { - info->tty->termios->c_cflag &= ~CBAUD; - info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD); - old_termios = NULL; - } - } while (quot == 0 && old_termios); - - /* As a last resort, if the quotient is zero, default to 9600 bps */ - if (!quot) - quot = (info->port->uartclk / (16 * 9600)) - 1; - - info->timeout = info->port->fifosize * HZ * bits / baud; - info->timeout += HZ/50; /* Add .02 seconds of slop */ - - if (cflag & CRTSCTS) - info->flags |= ASYNC_CTS_FLOW; - else - info->flags &= ~ASYNC_CTS_FLOW; - if (cflag & CLOCAL) - info->flags &= ~ASYNC_CHECK_CD; - else - info->flags |= ASYNC_CHECK_CD; - - /* - * Set up parity check flag - */ + /* + * clear delta_msr_wait queue to avoid mem leaks: we may free the irq + * here so the queue might never be woken up + */ + wake_up_interruptible(&info->delta_msr_wait); + + /* + * disable all interrupts, disable the port + */ + siccuart_disable_rx_interrupt(info); + siccuart_disable_tx_interrupt(info); + + /* + * Free the IRQ + */ + free_irq(info->port->irqtx, info); + free_irq(info->port->irqrx, info); + + if (info->xmit.buf) { + unsigned long pg = (unsigned long)info->xmit.buf; + info->xmit.buf = NULL; + free_page(pg); + } + + if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) + info->mctrl &= ~(TIOCM_DTR | TIOCM_RTS); + info->port->set_mctrl(info->port, info->mctrl); + + /* kill off our tasklet */ + tasklet_kill(&info->tlet); + if (info->tty) + set_bit(TTY_IO_ERROR, &info->tty->flags); + + info->flags &= ~ASYNC_INITIALIZED; + + spin_unlock_irqrestore(&info->state->sicc_lock, flags); +} + +static void siccuart_change_speed(struct SICC_info *info, + struct termios *old_termios) +{ + unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits; + unsigned long flags; + + if (!info->tty || !info->tty->termios) + return; + + cflag = info->tty->termios->c_cflag; + + pr_debug("siccuart_set_cflag(0x%x) called\n", cflag); + /* byte size and parity */ + switch (cflag & CSIZE) { + case CS7: + lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; + bits = 9; + break; + default: + lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; + bits = 10; + break; // CS8 + } + if (cflag & CSTOPB) { + lcr_h |= _LCR_SB_2_BIT; + bits++; + } + if (cflag & PARENB) { + lcr_h |= _LCR_PE_ENABLE; + bits++; + if (!(cflag & PARODD)) + lcr_h |= _LCR_PTY_ODD; + else + lcr_h |= _LCR_PTY_EVEN; + } + + do { + /* Determine divisor based on baud rate */ + baud = tty_get_baud_rate(info->tty); + if (!baud) + baud = 9600; + + { + // here is ppc403SetBaud(com_port, baud); + unsigned long divisor, clockSource, temp; + + /* Ensure CICCR[7] is 0 to select Internal Baud Clock */ + powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & + 0xFEFFFFFF)); + + /* Determine Internal Baud Clock Frequency */ + /* powerpcMfclkgpcr() reads DCR 0x120 - the */ + /* SCCR (Serial Clock Control Register) on Vesta */ + temp = powerpcMfclkgpcr(); + + if (temp & 0x00000080) { + clockSource = 324000000; + } else { + clockSource = 216000000; + } + clockSource = + clockSource / + (unsigned long)((temp & 0x00FC0000) >> 18); + divisor = clockSource / (16 * baud) - 1; + /* divisor has only 12 bits of resolution */ + if (divisor > 0x00000FFF) { + divisor = 0x00000FFF; + } + + quot = divisor; + } + + if (baud == 38400 && + ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)) + quot = info->state->custom_divisor; + + if (!quot && old_termios) { + info->tty->termios->c_cflag &= ~CBAUD; + info->tty->termios->c_cflag |= + (old_termios->c_cflag & CBAUD); + old_termios = NULL; + } + } while (quot == 0 && old_termios); + + /* As a last resort, if the quotient is zero, default to 9600 bps */ + if (!quot) + quot = (info->port->uartclk / (16 * 9600)) - 1; + + info->timeout = info->port->fifosize * HZ * bits / baud; + info->timeout += HZ / 50; /* Add .02 seconds of slop */ + + if (cflag & CRTSCTS) + info->flags |= ASYNC_CTS_FLOW; + else + info->flags &= ~ASYNC_CTS_FLOW; + if (cflag & CLOCAL) + info->flags &= ~ASYNC_CHECK_CD; + else + info->flags |= ASYNC_CHECK_CD; + + /* + * Set up parity check flag + */ #define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) - info->read_status_mask = _LSR_OE_MASK; - if (I_INPCK(info->tty)) - info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; - if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) - info->read_status_mask |= _LSR_LB_MASK; - - /* - * Characters to ignore - */ - info->ignore_status_mask = 0; - if (I_IGNPAR(info->tty)) - info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; - if (I_IGNBRK(info->tty)) { - info->ignore_status_mask |= _LSR_LB_MASK; - /* - * If we're ignoring parity and break indicators, - * ignore overruns to (for real raw support). - */ - if (I_IGNPAR(info->tty)) - info->ignore_status_mask |= _LSR_OE_MASK; - } - - /* disable interrupts while reading and clearing registers */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - - old_rcr = readb(info->port->uart_base + BL_SICC_RCR); - old_tcr = readb(info->port->uart_base + BL_SICC_TxCR); - - - writeb(0, info->port->uart_base + BL_SICC_RCR); - writeb(0, info->port->uart_base + BL_SICC_TxCR); - - /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/ + info->read_status_mask = _LSR_OE_MASK; + if (I_INPCK(info->tty)) + info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; + if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) + info->read_status_mask |= _LSR_LB_MASK; + + /* + * Characters to ignore + */ + info->ignore_status_mask = 0; + if (I_IGNPAR(info->tty)) + info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; + if (I_IGNBRK(info->tty)) { + info->ignore_status_mask |= _LSR_LB_MASK; + /* + * If we're ignoring parity and break indicators, + * ignore overruns to (for real raw support). + */ + if (I_IGNPAR(info->tty)) + info->ignore_status_mask |= _LSR_OE_MASK; + } + + /* disable interrupts while reading and clearing registers */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + + old_rcr = readb(info->port->uart_base + BL_SICC_RCR); + old_tcr = readb(info->port->uart_base + BL_SICC_TxCR); + + writeb(0, info->port->uart_base + BL_SICC_RCR); + writeb(0, info->port->uart_base + BL_SICC_TxCR); + + /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0); */ + + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + + /* Set baud rate */ + writeb((quot & 0x00000F00) >> 8, info->port->uart_base + BL_SICC_BRDH); + writeb(quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL); + + /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */ + /* For now, do NOT use FIFOs since 403 UART did not have this */ + /* capability and this driver was inherited from 403UART. */ + writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2); + writeb(lcr_h, info->port->uart_base + BL_SICC_LCR); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - - - /* Set baud rate */ - writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH ); - writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL ); - - /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */ - /* For now, do NOT use FIFOs since 403 UART did not have this */ - /* capability and this driver was inherited from 403UART. */ - writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2); - - writeb(lcr_h, info->port->uart_base + BL_SICC_LCR); - - writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr - writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr + writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr + writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr } - static void siccuart_put_char(struct tty_struct *tty, u_char ch) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - if (!tty || !info->xmit.buf) - return; + if (!tty || !info->xmit.buf) + return; - /* lock info->xmit while adding character to tx buffer */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) { - info->xmit.buf[info->xmit.head] = ch; - info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1); - } - spin_unlock_irqrestore(&info->state->sicc_lock,flags); + /* lock info->xmit while adding character to tx buffer */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) { + info->xmit.buf[info->xmit.head] = ch; + info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1); + } + spin_unlock_irqrestore(&info->state->sicc_lock, flags); } static void siccuart_flush_chars(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - if (info->xmit.head == info->xmit.tail - || tty->stopped - || tty->hw_stopped - || !info->xmit.buf) - return; - - /* disable interrupts while transmitting characters */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - -static int siccuart_write(struct tty_struct *tty, - const u_char * buf, int count) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - int c, ret = 0; - - if (!tty || !info->xmit.buf || !tmp_buf) - return 0; - - /* lock info->xmit while removing characters from buffer */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - while (1) { - c = CIRC_SPACE_TO_END(info->xmit.head, - info->xmit.tail, - SICC_XMIT_SIZE); - if (count < c) - c = count; - if (c <= 0) - break; - memcpy(info->xmit.buf + info->xmit.head, buf, c); - info->xmit.head = (info->xmit.head + c) & - (SICC_XMIT_SIZE - 1); - buf += c; - count -= c; - ret += c; - } - if (info->xmit.head != info->xmit.tail - && !tty->stopped - && !tty->hw_stopped) - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return ret; + if (info->xmit.head == info->xmit.tail + || tty->stopped || tty->hw_stopped || !info->xmit.buf) + return; + + /* disable interrupts while transmitting characters */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + siccuart_enable_tx_interrupt(info); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); +} + +static int siccuart_write(struct tty_struct *tty, const u_char * buf, int count) +{ + struct SICC_info *info = tty->driver_data; + unsigned long flags; + int c, ret = 0; + + if (!tty || !info->xmit.buf || !tmp_buf) + return 0; + + /* lock info->xmit while removing characters from buffer */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + while (1) { + c = CIRC_SPACE_TO_END(info->xmit.head, + info->xmit.tail, SICC_XMIT_SIZE); + if (count < c) + c = count; + if (c <= 0) + break; + memcpy(info->xmit.buf + info->xmit.head, buf, c); + info->xmit.head = (info->xmit.head + c) & (SICC_XMIT_SIZE - 1); + buf += c; + count -= c; + ret += c; + } + if (info->xmit.head != info->xmit.tail + && !tty->stopped && !tty->hw_stopped) + siccuart_enable_tx_interrupt(info); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + return ret; } static int siccuart_write_room(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; + struct SICC_info *info = tty->driver_data; - return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); + return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); } static int siccuart_chars_in_buffer(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; + struct SICC_info *info = tty->driver_data; - return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); + return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); } static void siccuart_flush_buffer(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - pr_debug("siccuart_flush_buffer(%d) called\n", tty->index); - /* lock info->xmit while zeroing buffer counts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->xmit.head = info->xmit.tail = 0; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - wake_up_interruptible(&tty->write_wait); - if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && - tty->ldisc.write_wakeup) - (tty->ldisc.write_wakeup)(tty); + pr_debug("siccuart_flush_buffer(%d) called\n", tty->index); + /* lock info->xmit while zeroing buffer counts */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + info->xmit.head = info->xmit.tail = 0; + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + wake_up_interruptible(&tty->write_wait); + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup) (tty); } /* @@ -1011,717 +994,712 @@ static void siccuart_flush_buffer(struct */ static void siccuart_send_xchar(struct tty_struct *tty, char ch) { - struct SICC_info *info = tty->driver_data; + struct SICC_info *info = tty->driver_data; - info->x_char = ch; - if (ch) - siccuart_enable_tx_interrupt(info); + info->x_char = ch; + if (ch) + siccuart_enable_tx_interrupt(info); } static void siccuart_throttle(struct tty_struct *tty) { - struct SICC_info *info = tty->driver_data; - unsigned long flags; + struct SICC_info *info = tty->driver_data; + unsigned long flags; - if (I_IXOFF(tty)) - siccuart_send_xchar(tty, STOP_CHAR(tty)); + if (I_IXOFF(tty)) + siccuart_send_xchar(tty, STOP_CHAR(tty)); - if (tty->termios->c_cflag & CRTSCTS) { - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl &= ~TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } + if (tty->termios->c_cflag & CRTSCTS) { + /* disable interrupts while setting modem control lines */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + info->mctrl &= ~TIOCM_RTS; + info->port->set_mctrl(info->port, info->mctrl); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + } } static void siccuart_unthrottle(struct tty_struct *tty) { - struct SICC_info *info = (struct SICC_info *) tty->driver_data; - unsigned long flags; + struct SICC_info *info = (struct SICC_info *)tty->driver_data; + unsigned long flags; - if (I_IXOFF(tty)) { - if (info->x_char) - info->x_char = 0; - else - siccuart_send_xchar(tty, START_CHAR(tty)); - } - - if (tty->termios->c_cflag & CRTSCTS) { - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl |= TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } -} - -static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo) -{ - struct SICC_state *state = info->state; - struct SICC_port *port = info->port; - struct serial_struct tmp; - - memset(&tmp, 0, sizeof(tmp)); - tmp.type = 0; - tmp.line = state->line; - tmp.port = port->uart_base; - if (HIGH_BITS_OFFSET) - tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET; - tmp.irq = port->irqrx; - tmp.flags = 0; - tmp.xmit_fifo_size = port->fifosize; - tmp.baud_base = port->uartclk / 16; - tmp.close_delay = state->close_delay; - tmp.closing_wait = state->closing_wait; - tmp.custom_divisor = state->custom_divisor; - - if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) - return -EFAULT; - return 0; + if (I_IXOFF(tty)) { + if (info->x_char) + info->x_char = 0; + else + siccuart_send_xchar(tty, START_CHAR(tty)); + } + + if (tty->termios->c_cflag & CRTSCTS) { + /* disable interrupts while setting modem control lines */ + spin_lock_irqsave(&info->state->sicc_lock, flags); + info->mctrl |= TIOCM_RTS; + info->port->set_mctrl(info->port, info->mctrl); + spin_unlock_irqrestore(&info->state->sicc_lock, flags); + } +} + +static int get_serial_info(struct SICC_info *info, + struct serial_struct *retinfo) +{ + struct SICC_state *state = info->state; + struct SICC_port *port = info->port; + struct serial_struct tmp; + + memset(&tmp, 0, sizeof(tmp)); + tmp.type = 0; + tmp.line = state->line; + tmp.port = port->uart_base; + if (HIGH_BITS_OFFSET) + tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET; + tmp.irq = port->irqrx; + tmp.flags = 0; + tmp.xmit_fifo_size = port->fifosize; + tmp.baud_base = port->uartclk / 16; + tmp.close_delay = state->close_delay; + tmp.closing_wait = state->closing_wait; + tmp.custom_divisor = state->custom_divisor; + + if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) + return -EFAULT; + return 0; } static int set_serial_info(struct SICC_info *info, - struct serial_struct *newinfo) + struct serial_struct *newinfo) { - struct serial_struct new_serial; - struct SICC_state *state, old_state; - struct SICC_port *port; - unsigned long new_port; - unsigned int i, change_irq, change_port; - int retval = 0; - - if (copy_from_user(&new_serial, newinfo, sizeof(new_serial))) - return -EFAULT; - - state = info->state; - old_state = *state; - port = info->port; - - new_port = new_serial.port; - if (HIGH_BITS_OFFSET) - new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET; - - change_irq = new_serial.irq != port->irqrx; - change_port = new_port != port->uart_base; - - if (!capable(CAP_SYS_ADMIN)) { - if (change_irq || change_port || - (new_serial.baud_base != port->uartclk / 16) || - (new_serial.close_delay != state->close_delay) || - (new_serial.xmit_fifo_size != port->fifosize) || - ((new_serial.flags & ~ASYNC_USR_MASK) != - (state->flags & ~ASYNC_USR_MASK))) - return -EPERM; - state->flags = ((state->flags & ~ASYNC_USR_MASK) | - (new_serial.flags & ASYNC_USR_MASK)); - info->flags = ((info->flags & ~ASYNC_USR_MASK) | - (new_serial.flags & ASYNC_USR_MASK)); - state->custom_divisor = new_serial.custom_divisor; - goto check_and_exit; - } - - if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) || - (new_serial.baud_base < 9600)) - return -EINVAL; - - if (new_serial.type && change_port) { - for (i = 0; i < SERIAL_SICC_NR; i++) - if ((port != sicc_ports + i) && - sicc_ports[i].uart_base != new_port) - return -EADDRINUSE; - } - - if ((change_port || change_irq) && (state->count > 1)) - return -EBUSY; - - /* - * OK, past this point, all the error checking has been done. - * At this point, we start making changes..... - */ - port->uartclk = new_serial.baud_base * 16; - state->flags = ((state->flags & ~ASYNC_FLAGS) | - (new_serial.flags & ASYNC_FLAGS)); - info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) | - (info->flags & ASYNC_INTERNAL_FLAGS)); - state->custom_divisor = new_serial.custom_divisor; - state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay); - state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait); - info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; - port->fifosize = new_serial.xmit_fifo_size; - - if (change_port || change_irq) { - /* - * We need to shutdown the serial port at the old - * port/irq combination. - */ - siccuart_shutdown(info); - port->irqrx = new_serial.irq; - port->uart_base = new_port; - } - -check_and_exit: - if (!port->uart_base) - return 0; - if (info->flags & ASYNC_INITIALIZED) { - if ((old_state.flags & ASYNC_SPD_MASK) != - (state->flags & ASYNC_SPD_MASK) || - (old_state.custom_divisor != state->custom_divisor)) { - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - info->tty->alt_speed = 57600; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - info->tty->alt_speed = 115200; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - info->tty->alt_speed = 230400; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - info->tty->alt_speed = 460800; - siccua